[PATCH] D55373: [LSR] Generate formulae to enable more indexed accesses

[Sam Parker via Phabricator via llvm-commits]

samparker marked an inline comment as done.
samparker added inline comments.


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Comment at: lib/Target/ARM/ARMTargetTransformInfo.h:99
+      return false;
+    return ST->isMClass() && ST->isThumb2() && L->getNumBlocks() == 1;
+  }
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gilr wrote:
> samparker wrote:
> > gilr wrote:
> > > Is the single-block constraint due to CodeGen's single-block optimization scope? (If so, then IINM it's not target-specific)
> > No, its not because of ISel restrictions or anything like that. It's because the transform is only likely to be useful is the address can be kept in the same register - which becomes increasingly less likely once multiple blocks are considered.
> So both the code-size and single-block heuristics seem target-independent. Why not do this in LSR?
I'd argue because different backends would come to different conclusions to me. I've gone for a very simplistic heuristic, but it would be good to consider register pressure rather than just the number of blocks. Also, some targets may not support indexed accesses on certain types of memory operations and so it worthless generating formulae for them. 


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https://reviews.llvm.org/D55373