[PATCH] D57763: [ARM] Add Cortex-M35P

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


================
Comment at: lib/Target/ARM/ARM.td:1018
+                                                         FeatureVFPOnlySP,
+                                                         FeatureUseMISched,
+                                                         FeatureHasNoBranchPredictor]>;
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olista01 wrote:
> Why are you enabling FeatureUseMISched? This is using the Cortex-M3 sched model, and Cortex-M3 doesn't have it.
My understanding is that this is very similar to the M33 from a compiler perspective. You can use the same features as there from a performance perspective (FeaturePrefLoopAlign32, FeatureHasSlowFPVMLx, FeatureHasNoBranchPredictor).


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D57763/new/

https://reviews.llvm.org/D57763