[PATCH] D57833: [ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


================
Comment at: lib/Target/ARM/ARMBaseInstrInfo.cpp:2624
+  if ((CmpI->getOpcode() == ARM::CMPrr || CmpI->getOpcode() == ARM::t2CMPrr) &&
+      (OI->getOpcode() == ARM::SUBrr || OI->getOpcode() == ARM::t2SUBrr) &&
       ((OI->getOperand(1).getReg() == SrcReg &&
----------------
Can you commit the reformatting separately?  It's a little confusing to distinguish which changes are actually relevant.


================
Comment at: lib/Target/ARM/ARMBaseInstrInfo.cpp:2660
+      (OI->getOpcode() == ARM::tADDi3 || OI->getOpcode() == ARM::tADDi8) &&
+      OI->getOperand(0).isReg() && OI->getOperand(2).isReg() &&
+      OI->getOperand(0).getReg() == SrcReg &&
----------------
What are these "isReg" checks supposed to do?  You already checked the opcode.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D57833/new/

https://reviews.llvm.org/D57833