[PATCH] D56864: [x86] vectorize cast ops in lowering to avoid register file transfers

[Sanjay Patel via Phabricator via llvm-commits]

spatel marked 3 inline comments as done.
spatel added inline comments.


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Comment at: lib/Target/X86/X86ISelLowering.cpp:17415
+  MVT DestVT = Cast.getSimpleValueType();
+  if (!Extract.hasOneUse() || Extract.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
+      !isNullConstant(Extract.getOperand(1)))
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RKSimon wrote:
> Is the one use necessary?  This combine should replace the scalar conversion with a vector, whether there are other uses of the scalar isn't necessarily relevant (but maybe extra instructions if we support shuffles in the future)?
Yes, I was being conservative, but avoiding the register transfer is probably still enough to justify the transform regardless of other uses. 

We don't have any existing regression tests to cover that pattern, so I added some with rL353249


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  https://reviews.llvm.org/D56864/new/

https://reviews.llvm.org/D56864