[PATCH] D56005: [RFC] [LLVM] Allocatable Global Register Variables for ARM

[Carey Williams via Phabricator via llvm-commits]

carwil updated this revision to Diff 185275.
carwil edited the summary of this revision.
carwil added a comment.

Fixed an oversight where R6 <https://reviews.llvm.org/source/compiler-rt/> could be used as the base pointer, even with ffixed-r6 specified.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56005/new/

https://reviews.llvm.org/D56005

Files:
  lib/Target/ARM/ARM.td
  lib/Target/ARM/ARMAsmPrinter.cpp
  lib/Target/ARM/ARMBaseRegisterInfo.cpp
  lib/Target/ARM/ARMFrameLowering.cpp
  lib/Target/ARM/ARMISelLowering.cpp
  lib/Target/ARM/ARMSubtarget.cpp
  lib/Target/ARM/ARMSubtarget.h
  lib/Target/ARM/ARMTargetTransformInfo.h
  test/CodeGen/ARM/named-reg-alloc.ll
  test/CodeGen/ARM/reg-alloc-fixed-r6-vla.ll
  test/CodeGen/ARM/reg-alloc-no-alignment.ll
  test/CodeGen/ARM/reg-alloc-with-fixed-reg-r5-r6.ll
  test/CodeGen/ARM/reg-alloc-with-fixed-reg-r5.ll
  test/CodeGen/ARM/reg-alloc-with-fixed-reg-r6-modified.ll
  test/CodeGen/ARM/reg-alloc-with-fixed-reg-r6.ll
  test/CodeGen/ARM/reg-alloc-wout-fixed-regs.ll
  test/CodeGen/Thumb/callee_save_reserved.ll

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