[llvm] r353141 - [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Mon Feb  4 22:13:06 2019
New Revision: 353141

URL: http://llvm.org/viewvc/llvm-project?rev=353141&view=rev
Log:
[X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them.

Summary:
We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly.

This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that.

Reviewers: rnk

Reviewed By: rnk

Subscribers: eraman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57641

Added:
    llvm/trunk/test/CodeGen/X86/inline-asm-default-clobbers.ll
Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86RegisterInfo.td

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=353141&r1=353140&r2=353141&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Feb  4 22:13:06 2019
@@ -43006,6 +43006,14 @@ X86TargetLowering::getRegForInlineAsmCon
     if (StringRef("{flags}").equals_lower(Constraint))
       return std::make_pair(X86::EFLAGS, &X86::CCRRegClass);
 
+    // dirflag -> DF
+    if (StringRef("{dirflag}").equals_lower(Constraint))
+      return std::make_pair(X86::DF, &X86::DFCCRRegClass);
+
+    // fpsr -> FPSW
+    if (StringRef("{fpsr}").equals_lower(Constraint))
+      return std::make_pair(X86::FPSW, &X86::FPCCRRegClass);
+
     // 'A' means [ER]AX + [ER]DX.
     if (Constraint == "A") {
       if (Subtarget.is64Bit())

Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.td?rev=353141&r1=353140&r2=353141&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.td Mon Feb  4 22:13:06 2019
@@ -287,7 +287,7 @@ def ST6 : X86Reg<"st(6)", 6>, DwarfRegNu
 def ST7 : X86Reg<"st(7)", 7>, DwarfRegNum<[40, 19, 18]>;
 
 // Floating-point status word
-def FPSW : X86Reg<"fpsw", 0>;
+def FPSW : X86Reg<"fpsr", 0>;
 
 // Status flags register.
 //

Added: llvm/trunk/test/CodeGen/X86/inline-asm-default-clobbers.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-default-clobbers.ll?rev=353141&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-default-clobbers.ll (added)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-default-clobbers.ll Mon Feb  4 22:13:06 2019
@@ -0,0 +1,8 @@
+; RUN: llc < %s -mtriple=i686 -stop-after=expand-isel-pseudos | FileCheck %s
+
+; CHECK: INLINEASM &"", 1, 12, implicit-def early-clobber $df, 12, implicit-def early-clobber $fpsw, 12, implicit-def early-clobber $eflags
+define void @foo() {
+entry:
+  call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
+  ret void
+}