[PATCH] D57735: [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 4 21:24:48 PST 2019
craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor.
Herald added a project: LLVM.
FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence.
This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529.
Repository:
rL LLVM
https://reviews.llvm.org/D57735
Files:
lib/Target/X86/X86InstrFPStack.td
lib/Target/X86/X86RegisterInfo.cpp
lib/Target/X86/X86RegisterInfo.td
test/CodeGen/MIR/X86/memory-operands.mir
test/CodeGen/X86/ipra-reg-usage.ll
test/CodeGen/X86/pr34080.ll
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