[llvm] r353128 - GlobalISel: Fix verifier crashing on non-register operands

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 4 16:53:23 PST 2019


Author: arsenm
Date: Mon Feb  4 16:53:22 2019
New Revision: 353128

URL: http://llvm.org/viewvc/llvm-project?rev=353128&view=rev
Log:
GlobalISel: Fix verifier crashing on non-register operands

Also correct the wording of error on subregisters.

Modified:
    llvm/trunk/lib/CodeGen/MachineVerifier.cpp
    llvm/trunk/test/Verifier/test_g_add.mir

Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=353128&r1=353127&r2=353128&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Mon Feb  4 16:53:22 2019
@@ -933,6 +933,11 @@ void MachineVerifier::verifyPreISelGener
     Types.resize(std::max(TypeIdx + 1, Types.size()));
 
     const MachineOperand *MO = &MI->getOperand(I);
+    if (!MO->isReg()) {
+      report("generic instruction must use register operands", MI);
+      continue;
+    }
+
     LLT OpTy = MRI->getType(MO->getReg());
     // Don't report a type mismatch if there is no actual mismatch, only a
     // type missing, to reduce noise:
@@ -1517,7 +1522,7 @@ MachineVerifier::visitMachineOperand(con
           return;
         }
         if (SubIdx)  {
-          report("Generic virtual register does not subregister index", MO,
+          report("Generic virtual register does not allow subregister index", MO,
                  MONum);
           return;
         }

Modified: llvm/trunk/test/Verifier/test_g_add.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Verifier/test_g_add.mir?rev=353128&r1=353127&r2=353128&view=diff
==============================================================================
--- llvm/trunk/test/Verifier/test_g_add.mir (original)
+++ llvm/trunk/test/Verifier/test_g_add.mir Mon Feb  4 16:53:22 2019
@@ -1,4 +1,4 @@
-#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not llc -march=aarch64 -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
 # REQUIRES: global-isel, aarch64-registered-target
 
 ---
@@ -25,4 +25,13 @@ body:             |
     ; CHECK: Bad machine code: Explicit definition marked as use
     G_ADD %0, %1
 
+    ; CHECK: Bad machine code: generic instruction must use register operands
+    %5:_(s32) = G_ADD %0, 1
+
+    %6:_(s64) = G_CONSTANT i64 0
+
+    ; CHECK: Bad machine code: Type mismatch in generic instruction
+    ; CHECK: Bad machine code: Generic virtual register does not allow subregister index
+    %8:_(s32) = G_ADD %6.sub_32:_(s64), %0
+
 ...




More information about the llvm-commits mailing list