[llvm] r353080 - GlobalISel: Allow constructing SrcOp/DstOp from MachineOperand
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 4 11:53:19 PST 2019
Author: arsenm
Date: Mon Feb 4 11:53:19 2019
New Revision: 353080
URL: http://llvm.org/viewvc/llvm-project?rev=353080&view=rev
Log:
GlobalISel: Allow constructing SrcOp/DstOp from MachineOperand
Modified:
llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
llvm/trunk/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h?rev=353080&r1=353079&r2=353080&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h (original)
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h Mon Feb 4 11:53:19 2019
@@ -66,6 +66,7 @@ class DstOp {
public:
enum class DstType { Ty_LLT, Ty_Reg, Ty_RC };
DstOp(unsigned R) : Reg(R), Ty(DstType::Ty_Reg) {}
+ DstOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(DstType::Ty_Reg) {}
DstOp(const LLT &T) : LLTTy(T), Ty(DstType::Ty_LLT) {}
DstOp(const TargetRegisterClass *TRC) : RC(TRC), Ty(DstType::Ty_RC) {}
@@ -125,6 +126,7 @@ class SrcOp {
public:
enum class SrcType { Ty_Reg, Ty_MIB, Ty_Predicate };
SrcOp(unsigned R) : Reg(R), Ty(SrcType::Ty_Reg) {}
+ SrcOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(SrcType::Ty_Reg) {}
SrcOp(const MachineInstrBuilder &MIB) : SrcMIB(MIB), Ty(SrcType::Ty_MIB) {}
SrcOp(const CmpInst::Predicate P) : Pred(P), Ty(SrcType::Ty_Predicate) {}
Modified: llvm/trunk/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp?rev=353080&r1=353079&r2=353080&view=diff
==============================================================================
--- llvm/trunk/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp (original)
+++ llvm/trunk/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp Mon Feb 4 11:53:19 2019
@@ -65,3 +65,28 @@ TEST_F(GISelMITest, TestBuildConstantFCo
#endif
#endif
+
+TEST_F(GISelMITest, DstOpSrcOp) {
+ if (!TM)
+ return;
+
+ SmallVector<unsigned, 4> Copies;
+ collectCopies(Copies, MF);
+
+ LLT s64 = LLT::scalar(64);
+ auto MIBAdd = B.buildAdd(s64, Copies[0], Copies[1]);
+
+ // Test SrcOp and DstOp can be constructed directly from MachineOperand by
+ // copying the instruction
+ B.buildAdd(MIBAdd->getOperand(0), MIBAdd->getOperand(1), MIBAdd->getOperand(2));
+
+
+ auto CheckStr = R"(
+ ; CHECK: [[COPY0:%[0-9]+]]:_(s64) = COPY $x0
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
+ ; CHECK: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY0]]:_, [[COPY1]]:_
+ ; CHECK: [[ADD]]:_(s64) = G_ADD [[COPY0]]:_, [[COPY1]]:_
+ )";
+
+ EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF;
+}
More information about the llvm-commits
mailing list