[llvm] r353042 - [X86] Add a couple of missed ADD combine tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 4 04:37:38 PST 2019
Author: rksimon
Date: Mon Feb 4 04:37:38 2019
New Revision: 353042
URL: http://llvm.org/viewvc/llvm-project?rev=353042&view=rev
Log:
[X86] Add a couple of missed ADD combine tests
Noticed while investigating PR40483
Modified:
llvm/trunk/test/CodeGen/X86/combine-add.ll
Modified: llvm/trunk/test/CodeGen/X86/combine-add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-add.ll?rev=353042&r1=353041&r2=353042&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-add.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-add.ll Mon Feb 4 04:37:38 2019
@@ -99,6 +99,48 @@ define <4 x i32> @combine_vec_add_sub1(<
ret <4 x i32> %2
}
+; FIXME: fold ((A-B)+(C-A)) -> (C-B)
+define <4 x i32> @combine_vec_add_sub_sub0(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
+; SSE-LABEL: combine_vec_add_sub_sub0:
+; SSE: # %bb.0:
+; SSE-NEXT: psubd %xmm0, %xmm2
+; SSE-NEXT: psubd %xmm1, %xmm0
+; SSE-NEXT: paddd %xmm2, %xmm0
+; SSE-NEXT: retq
+;
+; AVX-LABEL: combine_vec_add_sub_sub0:
+; AVX: # %bb.0:
+; AVX-NEXT: vpsubd %xmm1, %xmm0, %xmm1
+; AVX-NEXT: vpsubd %xmm0, %xmm2, %xmm0
+; AVX-NEXT: vpaddd %xmm0, %xmm1, %xmm0
+; AVX-NEXT: retq
+ %1 = sub <4 x i32> %a, %b
+ %2 = sub <4 x i32> %c, %a
+ %3 = add <4 x i32> %1, %2
+ ret <4 x i32> %3
+}
+
+; FIXME: fold ((A-B)+(B-C)) -> (A-C)
+define <4 x i32> @combine_vec_add_sub_sub1(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
+; SSE-LABEL: combine_vec_add_sub_sub1:
+; SSE: # %bb.0:
+; SSE-NEXT: psubd %xmm1, %xmm0
+; SSE-NEXT: psubd %xmm2, %xmm1
+; SSE-NEXT: paddd %xmm1, %xmm0
+; SSE-NEXT: retq
+;
+; AVX-LABEL: combine_vec_add_sub_sub1:
+; AVX: # %bb.0:
+; AVX-NEXT: vpsubd %xmm1, %xmm0, %xmm0
+; AVX-NEXT: vpsubd %xmm2, %xmm1, %xmm1
+; AVX-NEXT: vpaddd %xmm1, %xmm0, %xmm0
+; AVX-NEXT: retq
+ %1 = sub <4 x i32> %a, %b
+ %2 = sub <4 x i32> %b, %c
+ %3 = add <4 x i32> %1, %2
+ ret <4 x i32> %3
+}
+
; fold (A+(B-(A+C))) to (B-C)
define <4 x i32> @combine_vec_add_sub_add0(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
; SSE-LABEL: combine_vec_add_sub_add0:
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