[llvm] r352821 - [x86] adjust test to show both add/inc options; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Thu Jan 31 16:07:20 2019
New Revision: 352821

URL: http://llvm.org/viewvc/llvm-project?rev=352821&view=rev
Log:
[x86] adjust test to show both add/inc options; NFC

If we're optimizing for size, that overrides the subtarget
feature, so we would always produce 'inc' if we matched
this pattern.

Modified:
    llvm/trunk/test/CodeGen/X86/slow-incdec.ll

Modified: llvm/trunk/test/CodeGen/X86/slow-incdec.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/slow-incdec.ll?rev=352821&r1=352820&r2=352821&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/slow-incdec.ll (original)
+++ llvm/trunk/test/CodeGen/X86/slow-incdec.ll Thu Jan 31 16:07:20 2019
@@ -90,7 +90,7 @@ declare void @external_a()
 declare void @external_b()
 declare {i8, i1} @llvm.uadd.with.overflow.i8(i8, i8)
 
-define void @test_tail_call(i32* %ptr) nounwind optsize {
+define void @test_tail_call(i32* %ptr) nounwind {
 ; CHECK-LABEL: test_tail_call:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -99,9 +99,11 @@ define void @test_tail_call(i32* %ptr) n
 ; CHECK-NEXT:    addb $1, a
 ; CHECK-NEXT:    setb d
 ; CHECK-NEXT:    testb %al, %al
-; CHECK-NEXT:    jne external_b # TAILCALL
+; CHECK-NEXT:    jne .LBB5_2
 ; CHECK-NEXT:  # %bb.1: # %then
 ; CHECK-NEXT:    jmp external_a # TAILCALL
+; CHECK-NEXT:  .LBB5_2: # %else
+; CHECK-NEXT:    jmp external_b # TAILCALL
 entry:
   %val = load i32, i32* %ptr
   %add_ov = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %val, i32 1)