[PATCH] D57481: [WebAssembly] Fix a regression selecting negative build_vector lanes
Thomas Lively via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 31 15:22:34 PST 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rL352813: [WebAssembly] Fix a regression selecting negative build_vector lanes (authored by tlively, committed by ).
Herald added a project: LLVM.
Changed prior to commit:
https://reviews.llvm.org/D57481?vs=184622&id=184633#toc
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D57481/new/
https://reviews.llvm.org/D57481
Files:
llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/trunk/test/CodeGen/WebAssembly/simd-build-vector.ll
Index: llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
===================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -30,7 +30,7 @@
// Constrained immediate argument types
foreach SIZE = [8, 16] in
def ImmI#SIZE : ImmLeaf<i32,
- "return ((uint64_t)Imm & ((1UL << "#SIZE#") - 1)) == (uint64_t)Imm;"
+ "return -(1 << ("#SIZE#" - 1)) <= Imm && Imm < (1 << ("#SIZE#" - 1));"
>;
foreach SIZE = [2, 4, 8, 16, 32] in
def LaneIdx#SIZE : ImmLeaf<i32, "return 0 <= Imm && Imm < "#SIZE#";">;
Index: llvm/trunk/test/CodeGen/WebAssembly/simd-build-vector.ll
===================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/simd-build-vector.ll
+++ llvm/trunk/test/CodeGen/WebAssembly/simd-build-vector.ll
@@ -23,12 +23,12 @@
; CHECK-LABEL: different_const_one_replaced_i8x16:
; CHECK-NEXT: .functype different_const_one_replaced_i8x16 (i32) -> (v128)
-; CHECK-NEXT: v128.const $push[[L0:[0-9]+]]=, 1, 2, 3, 4, 5, 0, 7, 8
+; CHECK-NEXT: v128.const $push[[L0:[0-9]+]]=, 1, -2, 3, -4, 5, 0, 7, -8
; CHECK-NEXT: i16x8.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 5, $0
; CHECK-NEXT: return $pop[[L1]]
define <8 x i16> @different_const_one_replaced_i8x16(i16 %x) {
%v = insertelement
- <8 x i16> <i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>,
+ <8 x i16> <i16 1, i16 -2, i16 3, i16 -4, i16 5, i16 -6, i16 7, i16 -8>,
i16 %x,
i32 5
ret <8 x i16> %v
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