[PATCH] D53235: [RISCV] Add RV64F codegen support

[Alex Bradbury via Phabricator via llvm-commits]

This revision was not accepted when it landed; it landed in state "Needs Review".
This revision was automatically updated to reflect the committed changes.
Closed by commit rL352807: [RISCV] Add RV64F codegen support (authored by asb, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D53235?vs=184533&id=184621#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D53235/new/

https://reviews.llvm.org/D53235

Files:
  llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/trunk/lib/Target/RISCV/RISCVISelLowering.h
  llvm/trunk/lib/Target/RISCV/RISCVInstrInfoF.td
  llvm/trunk/test/CodeGen/RISCV/float-arith.ll
  llvm/trunk/test/CodeGen/RISCV/float-bitmanip-dagcombines.ll
  llvm/trunk/test/CodeGen/RISCV/float-br-fcmp.ll
  llvm/trunk/test/CodeGen/RISCV/float-convert.ll
  llvm/trunk/test/CodeGen/RISCV/float-fcmp.ll
  llvm/trunk/test/CodeGen/RISCV/float-imm.ll
  llvm/trunk/test/CodeGen/RISCV/float-mem.ll
  llvm/trunk/test/CodeGen/RISCV/float-select-fcmp.ll
  llvm/trunk/test/CodeGen/RISCV/rv32i-rv64i-float-double.ll
  llvm/trunk/test/CodeGen/RISCV/rv64f-float-convert.ll

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