[llvm] r352742 - [X86][AVX] Fold vt1 concat_vectors(vt2 undef, vt2 broadcast(x)) --> vt1 broadcast(x)

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Thu Jan 31 03:15:05 2019
New Revision: 352742

URL: http://llvm.org/viewvc/llvm-project?rev=352742&view=rev
Log:
[X86][AVX] Fold vt1 concat_vectors(vt2 undef, vt2 broadcast(x)) --> vt1 broadcast(x)

If we're not inserting the broadcast into the lowest subvector then we can avoid the insertion by just performing a larger broadcast.

Avoids a regression when we enable AVX1 broadcasts in shuffle combining

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/insert-into-constant-vector.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=352742&r1=352741&r2=352742&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Jan 31 03:15:05 2019
@@ -41593,6 +41593,7 @@ static SDValue combineInsertSubvector(SD
 
       // If this is subv_broadcast insert into both halves, use a larger
       // subv_broadcast.
+      // TODO - handle X86ISD::VBROADCAST as well?
       if (SubVec.getOpcode() == X86ISD::SUBV_BROADCAST && SubVec == SubVec2)
         return DAG.getNode(X86ISD::SUBV_BROADCAST, dl, OpVT,
                            SubVec.getOperand(0));
@@ -41614,11 +41615,14 @@ static SDValue combineInsertSubvector(SD
                           SubVec2, Vec.getOperand(2));
         return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, OpVT, Vec, SubVec,
                            N->getOperand(2));
-
       }
     }
   }
 
+  // If this is a broadcast insert into an upper undef, use a larger broadcast.
+  if (Vec.isUndef() && IdxVal != 0 && SubVec.getOpcode() == X86ISD::VBROADCAST)
+    return DAG.getNode(X86ISD::VBROADCAST, dl, OpVT, SubVec.getOperand(0));
+
   return SDValue();
 }
 

Modified: llvm/trunk/test/CodeGen/X86/insert-into-constant-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/insert-into-constant-vector.ll?rev=352742&r1=352741&r2=352742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/insert-into-constant-vector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/insert-into-constant-vector.ll Thu Jan 31 03:15:05 2019
@@ -289,31 +289,27 @@ define <8 x i32> @elt7_v8i32(i32 %x) {
 ;
 ; X32AVX2-LABEL: elt7_v8i32:
 ; X32AVX2:       # %bb.0:
-; X32AVX2-NEXT:    vbroadcastss {{[0-9]+}}(%esp), %xmm0
-; X32AVX2-NEXT:    vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32AVX2-NEXT:    vbroadcastss {{[0-9]+}}(%esp), %ymm0
 ; X32AVX2-NEXT:    vblendps {{.*#+}} ymm0 = mem[0,1,2,3,4,5,6],ymm0[7]
 ; X32AVX2-NEXT:    retl
 ;
 ; X64AVX2-LABEL: elt7_v8i32:
 ; X64AVX2:       # %bb.0:
 ; X64AVX2-NEXT:    vmovd %edi, %xmm0
-; X64AVX2-NEXT:    vpbroadcastd %xmm0, %xmm0
-; X64AVX2-NEXT:    vinserti128 $1, %xmm0, %ymm0, %ymm0
+; X64AVX2-NEXT:    vpbroadcastd %xmm0, %ymm0
 ; X64AVX2-NEXT:    vpblendd {{.*#+}} ymm0 = mem[0,1,2,3,4,5,6],ymm0[7]
 ; X64AVX2-NEXT:    retq
 ;
 ; X32AVX512F-LABEL: elt7_v8i32:
 ; X32AVX512F:       # %bb.0:
-; X32AVX512F-NEXT:    vbroadcastss {{[0-9]+}}(%esp), %xmm0
-; X32AVX512F-NEXT:    vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32AVX512F-NEXT:    vbroadcastss {{[0-9]+}}(%esp), %ymm0
 ; X32AVX512F-NEXT:    vblendps {{.*#+}} ymm0 = mem[0,1,2,3,4,5,6],ymm0[7]
 ; X32AVX512F-NEXT:    retl
 ;
 ; X64AVX512F-LABEL: elt7_v8i32:
 ; X64AVX512F:       # %bb.0:
 ; X64AVX512F-NEXT:    vmovd %edi, %xmm0
-; X64AVX512F-NEXT:    vpbroadcastd %xmm0, %xmm0
-; X64AVX512F-NEXT:    vinserti128 $1, %xmm0, %ymm0, %ymm0
+; X64AVX512F-NEXT:    vpbroadcastd %xmm0, %ymm0
 ; X64AVX512F-NEXT:    vpblendd {{.*#+}} ymm0 = mem[0,1,2,3,4,5,6],ymm0[7]
 ; X64AVX512F-NEXT:    retq
    %ins = insertelement <8 x i32> <i32 42, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, i32 %x, i32 7