[llvm] r352698 - [X86] Remove handling of ISD::INTRINSIC_WO_CHAIN in ReplaceNodeResults.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 30 16:04:46 PST 2019
Author: ctopper
Date: Wed Jan 30 16:04:46 2019
New Revision: 352698
URL: http://llvm.org/viewvc/llvm-project?rev=352698&view=rev
Log:
[X86] Remove handling of ISD::INTRINSIC_WO_CHAIN in ReplaceNodeResults.
I believe this was there to handle avx512bw intrinsics that returned i64 type in 32-bit mode. But all those intrinsics have since been changed to v64i1 results or replaced with generic IR.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=352698&r1=352697&r2=352698&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Jan 30 16:04:46 2019
@@ -1787,7 +1787,6 @@ X86TargetLowering::X86TargetLowering(con
setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom);
if (!Subtarget.is64Bit()) {
setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i64, Custom);
- setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i64, Custom);
}
// Only custom-lower 64-bit SADDO and friends on 64-bit because we don't
@@ -26923,11 +26922,6 @@ void X86TargetLowering::ReplaceNodeResul
return getExtendedControlRegister(N, dl, DAG, Subtarget, Results);
}
}
- case ISD::INTRINSIC_WO_CHAIN: {
- if (SDValue V = LowerINTRINSIC_WO_CHAIN(SDValue(N, 0), DAG))
- Results.push_back(V);
- return;
- }
case ISD::READCYCLECOUNTER: {
return getReadTimeStampCounter(N, dl, X86ISD::RDTSC_DAG, DAG, Subtarget,
Results);
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