[PATCH] D57457: [docs][mips] 8.0 Release notes
Simon Atanasyan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 30 14:45:19 PST 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rL352682: [docs][mips] 8.0 Release notes (authored by atanasyan, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D57457?vs=184307&id=184376#toc
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D57457/new/
https://reviews.llvm.org/D57457
Files:
llvm/branches/release_80/docs/ReleaseNotes.rst
Index: llvm/branches/release_80/docs/ReleaseNotes.rst
===================================================================
--- llvm/branches/release_80/docs/ReleaseNotes.rst
+++ llvm/branches/release_80/docs/ReleaseNotes.rst
@@ -52,6 +52,8 @@
from a dll are accessed via a stub, to allow the linker to convert it to
a dllimport if needed.
+* Added support for labels as offsets in ``.reloc`` directive.
+
.. NOTE
If you would like to document a larger change, then you can add a
subsection about it right here. You can copy the following boilerplate
@@ -82,8 +84,23 @@
Changes to the MIPS Target
--------------------------
- During this release ...
+* Improved support of GlobalISel instruction selection framework.
+
+* Implemented emission of ``R_MIPS_JALR`` and ``R_MICROMIPS_JALR``
+ relocations. These relocations provide hints to a linker for optimization
+ of jumps to protected symbols.
+
+* ORC JIT has been supported for MIPS and MIPS64 architectures.
+
+* Assembler now suggests alternative MIPS instruction mnemonics when
+ an invalid one is specified.
+
+* Improved support for MIPS N32 ABI.
+
+* Added new instructions (``pll.ps``, ``plu.ps``, ``cvt.s.pu``,
+ ``cvt.s.pl``, ``cvt.ps``, ``sigrie``).
+* Numerous bug fixes and code cleanups.
Changes to the PowerPC Target
-----------------------------
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