[llvm] r352678 - [AArch64][x86] add tests for add/sub signbits fold; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Wed Jan 30 13:58:20 2019
New Revision: 352678

URL: http://llvm.org/viewvc/llvm-project?rev=352678&view=rev
Log:
[AArch64][x86] add tests for add/sub signbits fold; NFC

As discussed/shown in D57401, we are missing a fold for
subtract of 0/1 --> add 0/-1.

Modified:
    llvm/trunk/test/CodeGen/AArch64/bool-ext-inc.ll
    llvm/trunk/test/CodeGen/X86/bool-ext-inc.ll

Modified: llvm/trunk/test/CodeGen/AArch64/bool-ext-inc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/bool-ext-inc.ll?rev=352678&r1=352677&r2=352678&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/bool-ext-inc.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/bool-ext-inc.ll Wed Jan 30 13:58:20 2019
@@ -27,3 +27,34 @@ define <4 x i32> @zextbool_sub_vector(<4
   ret <4 x i32> %s
 }
 
+define i32 @assertsext_sub_1(i1 signext %cond, i32 %y) {
+; CHECK-LABEL: assertsext_sub_1:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    and w8, w0, #0x1
+; CHECK-NEXT:    sub w0, w1, w8
+; CHECK-NEXT:    ret
+  %e = zext i1 %cond to i32
+  %r = sub i32 %y, %e
+  ret i32 %r
+}
+
+define i32 @assertsext_add_1(i1 signext %cond, i32 %y) {
+; CHECK-LABEL: assertsext_add_1:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    sub w0, w1, w0
+; CHECK-NEXT:    ret
+  %e = zext i1 %cond to i32
+  %r = add i32 %e, %y
+  ret i32 %r
+}
+
+define i32 @assertsext_add_1_commute(i1 signext %cond, i32 %y) {
+; CHECK-LABEL: assertsext_add_1_commute:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    sub w0, w1, w0
+; CHECK-NEXT:    ret
+  %e = zext i1 %cond to i32
+  %r = add i32 %y, %e
+  ret i32 %r
+}
+

Modified: llvm/trunk/test/CodeGen/X86/bool-ext-inc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bool-ext-inc.ll?rev=352678&r1=352677&r2=352678&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bool-ext-inc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bool-ext-inc.ll Wed Jan 30 13:58:20 2019
@@ -127,3 +127,37 @@ define <4 x i32> @zextbool_sub_vector(<4
   ret <4 x i32> %s
 }
 
+define i32 @assertsext_sub_1(i1 signext %cond, i32 %y) {
+; CHECK-LABEL: assertsext_sub_1:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %esi, %eax
+; CHECK-NEXT:    andl $1, %edi
+; CHECK-NEXT:    subl %edi, %eax
+; CHECK-NEXT:    retq
+  %e = zext i1 %cond to i32
+  %r = sub i32 %y, %e
+  ret i32 %r
+}
+
+define i32 @assertsext_add_1(i1 signext %cond, i32 %y) {
+; CHECK-LABEL: assertsext_add_1:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %esi, %eax
+; CHECK-NEXT:    subl %edi, %eax
+; CHECK-NEXT:    retq
+  %e = zext i1 %cond to i32
+  %r = add i32 %e, %y
+  ret i32 %r
+}
+
+define i32 @assertsext_add_1_commute(i1 signext %cond, i32 %y) {
+; CHECK-LABEL: assertsext_add_1_commute:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %esi, %eax
+; CHECK-NEXT:    subl %edi, %eax
+; CHECK-NEXT:    retq
+  %e = zext i1 %cond to i32
+  %r = add i32 %y, %e
+  ret i32 %r
+}
+