[llvm] r352519 - [AArch64] add tests for vector bool math; NFC

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 29 09:00:08 PST 2019


Author: spatel
Date: Tue Jan 29 09:00:07 2019
New Revision: 352519

URL: http://llvm.org/viewvc/llvm-project?rev=352519&view=rev
Log:
[AArch64] add tests for vector bool math; NFC

Added:
    llvm/trunk/test/CodeGen/AArch64/bool-ext-inc.ll

Added: llvm/trunk/test/CodeGen/AArch64/bool-ext-inc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/bool-ext-inc.ll?rev=352519&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/bool-ext-inc.ll (added)
+++ llvm/trunk/test/CodeGen/AArch64/bool-ext-inc.ll Tue Jan 29 09:00:07 2019
@@ -0,0 +1,29 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
+
+define <4 x i32> @sextbool_add_vector(<4 x i32> %c1, <4 x i32> %c2, <4 x i32> %x) {
+; CHECK-LABEL: sextbool_add_vector:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    cmeq v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:    add v0.4s, v2.4s, v0.4s
+; CHECK-NEXT:    ret
+  %c = icmp eq <4 x i32> %c1, %c2
+  %b = sext <4 x i1> %c to <4 x i32>
+  %s = add <4 x i32> %x, %b
+  ret <4 x i32> %s
+}
+
+define <4 x i32> @zextbool_sub_vector(<4 x i32> %c1, <4 x i32> %c2, <4 x i32> %x) {
+; CHECK-LABEL: zextbool_sub_vector:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    cmeq v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:    movi v1.4s, #1
+; CHECK-NEXT:    and v0.16b, v0.16b, v1.16b
+; CHECK-NEXT:    sub v0.4s, v2.4s, v0.4s
+; CHECK-NEXT:    ret
+  %c = icmp eq <4 x i32> %c1, %c2
+  %b = zext <4 x i1> %c to <4 x i32>
+  %s = sub <4 x i32> %x, %b
+  ret <4 x i32> %s
+}
+




More information about the llvm-commits mailing list