[PATCH] D57298: [X86] Mark EMMS and FEMMS as clobbering MM0-7 and ST0-7.

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

I guess this is fine; we do technically need to clobber MM* when we see emms, in case someone writes an emms between two MMX operations.  But this doesn't solve the related issues with pre-RA scheduling or IR code movement, though, so I'd hesitate to say this fixes PR35982.

It's unfortunate that emms is so slow on Intel processors that it's impractical to insert automatically like we do for vzeroupper.


Repository:
  rL LLVM

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https://reviews.llvm.org/D57298