[llvm] r352401 - [GlobalISel][AArch64] Add IRTranslator support for G_FCOS and G_FSIN
Jessica Paquette via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 28 10:34:17 PST 2019
Author: paquette
Date: Mon Jan 28 10:34:17 2019
New Revision: 352401
URL: http://llvm.org/viewvc/llvm-project?rev=352401&view=rev
Log:
[GlobalISel][AArch64] Add IRTranslator support for G_FCOS and G_FSIN
This adds IRTranslator support for the G_FCOS and G_FSIN generic instructions.
https://reviews.llvm.org/D57197
2/3
Modified:
llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp
llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
Modified: llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp?rev=352401&r1=352400&r2=352401&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp Mon Jan 28 10:34:17 2019
@@ -1055,6 +1055,16 @@ bool IRTranslator::translateKnownIntrins
.addDef(getOrCreateVReg(CI))
.addUse(getOrCreateVReg(*CI.getArgOperand(0)));
return true;
+ case Intrinsic::cos:
+ MIRBuilder.buildInstr(TargetOpcode::G_FCOS)
+ .addDef(getOrCreateVReg(CI))
+ .addUse(getOrCreateVReg(*CI.getArgOperand(0)));
+ return true;
+ case Intrinsic::sin:
+ MIRBuilder.buildInstr(TargetOpcode::G_FSIN)
+ .addDef(getOrCreateVReg(CI))
+ .addUse(getOrCreateVReg(*CI.getArgOperand(0)));
+ return true;
}
return false;
}
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll?rev=352401&r1=352400&r2=352401&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll Mon Jan 28 10:34:17 2019
@@ -2293,3 +2293,19 @@ define <2 x double> @test_ceil_v2f64(<2
%y = call <2 x double> @llvm.ceil.v2f64(<2 x double> %x)
ret <2 x double> %y
}
+
+declare float @llvm.cos.f32(float)
+define float @test_cos_f32(float %x) {
+ ; CHECK-LABEL: name: test_cos_f32
+ ; CHECK: %{{[0-9]+}}:_(s32) = G_FCOS %{{[0-9]+}}
+ %y = call float @llvm.cos.f32(float %x)
+ ret float %y
+}
+
+declare float @llvm.sin.f32(float)
+define float @test_sin_f32(float %x) {
+ ; CHECK-LABEL: name: test_sin_f32
+ ; CHECK: %{{[0-9]+}}:_(s32) = G_FSIN %{{[0-9]+}}
+ %y = call float @llvm.sin.f32(float %x)
+ ret float %y
+}
More information about the llvm-commits
mailing list