[PATCH] D57340: AMDGPU: Add DS append/consume intrinsics

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: rampitec, b-sumner.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.
arsenm marked an inline comment as done.
arsenm added inline comments.


================
Comment at: include/llvm/IR/IntrinsicsAMDGPU.td:412-413
+  [llvm_anyptr_ty, // LDS or GDS ptr
+   llvm_i32_ty, // ordering
+   llvm_i32_ty, // scope
+   llvm_i1_ty], // isVolatile
----------------
Not sure if we really need these, I should probably drop them


Since these pass the pointer in m0 unlike other DS instructions, these
need to worry about whether the address is uniform or not. This
assumes the address is dynamically uniform, and just uses
readfirstlane to get a copy into an SGPR.

      

I don't know if these have the same 16-bit add for the addressing mode
offset problem on SI or not, but I've just assumed they do.

      

Also includes some misc. changes to avoid test differences between the
LDS and GDS versions.


https://reviews.llvm.org/D57340

Files:
  include/llvm/IR/IntrinsicsAMDGPU.td
  lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  test/CodeGen/AMDGPU/llvm.amdgcn.ds.append.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll

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