[llvm] r352296 - [GlobalISel][IRTranslator] Fix crash on translation of fneg.

[Amara Emerson via llvm-commits]

Author: aemerson
Date: Sat Jan 26 15:47:09 2019
New Revision: 352296

URL: http://llvm.org/viewvc/llvm-project?rev=352296&view=rev
Log:
[GlobalISel][IRTranslator] Fix crash on translation of fneg.

When the fneg IR instruction was added the code to do translation wasn't
tested, and tried to get an invalid operand.

Modified:
    llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll

Modified: llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp?rev=352296&r1=352295&r2=352296&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp Sat Jan 26 15:47:09 2019
@@ -343,7 +343,7 @@ bool IRTranslator::translateFSub(const U
 bool IRTranslator::translateFNeg(const User &U, MachineIRBuilder &MIRBuilder) {
   MIRBuilder.buildInstr(TargetOpcode::G_FNEG)
       .addDef(getOrCreateVReg(U))
-      .addUse(getOrCreateVReg(*U.getOperand(1)));
+      .addUse(getOrCreateVReg(*U.getOperand(0)));
   return true;
 }
 

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll?rev=352296&r1=352295&r2=352296&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll Sat Jan 26 15:47:09 2019
@@ -824,6 +824,16 @@ define float @test_frem(float %arg1, flo
   ret float %res
 }
 
+; CHECK-LABEL: name: test_fneg
+; CHECK: [[ARG1:%[0-9]+]]:_(s32) = COPY $s0
+; CHECK-NEXT: [[RES:%[0-9]+]]:_(s32) = G_FNEG [[ARG1]]
+; CHECK-NEXT: $s0 = COPY [[RES]]
+; CHECK-NEXT: RET_ReallyLR implicit $s0
+define float @test_fneg(float %arg1) {
+  %res = fneg float %arg1
+  ret float %res
+}
+
 ; CHECK-LABEL: name: test_sadd_overflow
 ; CHECK: [[LHS:%[0-9]+]]:_(s32) = COPY $w0
 ; CHECK: [[RHS:%[0-9]+]]:_(s32) = COPY $w1