[PATCH] D57197: [GlobalISel][AArch64] Add support for @llvm.cos and @llvm.sin intrinsics
Jessica Paquette via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 24 15:27:13 PST 2019
paquette created this revision.
paquette added reviewers: aemerson, dsanders.
Herald added subscribers: volkan, kristof.beyls, javed.absar, rovka.
This adds instruction selection support for the @llvm.cos and @llvm.sin intrinsics.
It adds the G_FCOS and G_FSIN generic instructions, vector support for them, and support for lowering them to the appropriate RTLib calls.
It also adds the relevant legalizer tests, and Global ISel checks to existing non-GISel tests scattered about test/CodeGen/AArch64.
"SELECT ALL THE TRIG INTRINSICS"
all_the_things <https://reviews.llvm.org/file/data/jov4qcjnqynjqteuyxdu/PHID-FILE-pnpmgzwh64664ou2o375/meme-all_the_things>
https://reviews.llvm.org/D57197
Files:
include/llvm/Support/TargetOpcodes.def
include/llvm/Target/GenericOpcodes.td
include/llvm/Target/GlobalISel/SelectionDAGCompat.td
lib/CodeGen/GlobalISel/IRTranslator.cpp
lib/CodeGen/GlobalISel/LegalizerHelper.cpp
lib/Target/AArch64/AArch64LegalizerInfo.cpp
lib/Target/AArch64/AArch64RegisterBankInfo.cpp
test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
test/CodeGen/AArch64/GlobalISel/legalize-cos.mir
test/CodeGen/AArch64/GlobalISel/legalize-sin.mir
test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
test/CodeGen/AArch64/arm64-vfloatintrinsics.ll
test/CodeGen/AArch64/f16-instructions.ll
test/CodeGen/AArch64/sincospow-vector-expansion.ll
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