[llvm] r352126 - [GISel]: Change how CSE is enabled by default for each pass
Aditya Nandakumar via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 24 15:11:26 PST 2019
Author: aditya_nandakumar
Date: Thu Jan 24 15:11:25 2019
New Revision: 352126
URL: http://llvm.org/viewvc/llvm-project?rev=352126&view=rev
Log:
[GISel]: Change how CSE is enabled by default for each pass
https://reviews.llvm.org/D57178
Now add a hook in TargetPassConfig to query if CSE needs to be
enabled. By default this hook returns false only for O0 opt level but
this can be overridden by the target.
As a consequence of the default of enabled for non O0, a few tests
needed to be updated to not use CSE (by passing in -O0) to the run
line.
reviewed by: arsenm
Modified:
llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h
llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp
llvm/trunk/lib/CodeGen/GlobalISel/Legalizer.cpp
llvm/trunk/lib/CodeGen/TargetPassConfig.cpp
llvm/trunk/test/CodeGen/AArch64/GlobalISel/call-translator-cse.ll
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-div.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext-cse.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store-fewerElts.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store-s128-unaligned.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir
llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir
llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir
llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll
llvm/trunk/test/CodeGen/X86/GlobalISel/callingconv.ll
llvm/trunk/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll
llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-add.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-and-scalar.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-ext-x86-64.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-or-scalar.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-sub.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-trunc.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-xor-scalar.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-legalize-sitofp.mir
Modified: llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h (original)
+++ llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h Thu Jan 24 15:11:25 2019
@@ -315,6 +315,10 @@ public:
/// when GlobalISel failed and isGlobalISelAbortEnabled is false.
virtual bool reportDiagnosticWhenGlobalISelFallback() const;
+ /// Check whether continuous CSE should be enabled in GISel passes.
+ /// By default, it's enabled for non O0 levels.
+ virtual bool isGISelCSEEnabled() const;
+
protected:
// Helper to verify the analysis is really immutable.
void setOpt(bool &Opt, bool Val);
Modified: llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp Thu Jan 24 15:11:25 2019
@@ -1709,9 +1709,10 @@ bool IRTranslator::runOnMachineFunction(
// Set the CSEConfig and run the analysis.
GISelCSEInfo *CSEInfo = nullptr;
TPC = &getAnalysis<TargetPassConfig>();
- bool IsO0 = TPC->getOptLevel() == CodeGenOpt::Level::None;
- // Disable CSE for O0.
- bool EnableCSE = !IsO0 && EnableCSEInIRTranslator;
+ bool EnableCSE = EnableCSEInIRTranslator.getNumOccurrences()
+ ? EnableCSEInIRTranslator
+ : TPC->isGISelCSEEnabled();
+
if (EnableCSE) {
EntryBuilder = make_unique<CSEMIRBuilder>(CurMF);
std::unique_ptr<CSEConfig> Config = make_unique<CSEConfig>();
Modified: llvm/trunk/lib/CodeGen/GlobalISel/Legalizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/Legalizer.cpp?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/Legalizer.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/Legalizer.cpp Thu Jan 24 15:11:25 2019
@@ -161,9 +161,10 @@ bool Legalizer::runOnMachineFunction(Mac
}
std::unique_ptr<MachineIRBuilder> MIRBuilder;
GISelCSEInfo *CSEInfo = nullptr;
- bool IsO0 = TPC.getOptLevel() == CodeGenOpt::Level::None;
- // Disable CSE for O0.
- bool EnableCSE = !IsO0 && EnableCSEInLegalizer;
+ bool EnableCSE = EnableCSEInLegalizer.getNumOccurrences()
+ ? EnableCSEInLegalizer
+ : TPC.isGISelCSEEnabled();
+
if (EnableCSE) {
MIRBuilder = make_unique<CSEMIRBuilder>();
std::unique_ptr<CSEConfig> Config = make_unique<CSEConfig>();
Modified: llvm/trunk/lib/CodeGen/TargetPassConfig.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetPassConfig.cpp?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TargetPassConfig.cpp (original)
+++ llvm/trunk/lib/CodeGen/TargetPassConfig.cpp Thu Jan 24 15:11:25 2019
@@ -1220,3 +1220,7 @@ bool TargetPassConfig::isGlobalISelAbort
bool TargetPassConfig::reportDiagnosticWhenGlobalISelFallback() const {
return TM->Options.GlobalISelAbort == GlobalISelAbortMode::DisableWithDiag;
}
+
+bool TargetPassConfig::isGISelCSEEnabled() const {
+ return getOptLevel() != CodeGenOpt::Level::None;
+}
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/call-translator-cse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/call-translator-cse.ll?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/call-translator-cse.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/call-translator-cse.ll Thu Jan 24 15:11:25 2019
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=aarch64-linux-gnu -O1 -stop-after=irtranslator -enable-cse-in-irtranslator=1 -global-isel -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
+; RUN: llc -mtriple=aarch64-linux-gnu -stop-after=irtranslator -enable-cse-in-irtranslator=1 -global-isel -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
; CHECK-LABEL: name: test_split_struct
; CHECK: [[ADDR:%[0-9]+]]:_(p0) = COPY $x0
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -O0 -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
---
name: test_icmp
body: |
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-div.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-div.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-div.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-div.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -O0 -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
---
name: test_div
body: |
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext-cse.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext-cse.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext-cse.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext-cse.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=aarch64 -run-pass=legalizer %s -o - -enable-cse-in-legalizer=1 -O1 | FileCheck %s
+# RUN: llc -march=aarch64 -run-pass=legalizer %s -o - -enable-cse-in-legalizer=1 | FileCheck %s
---
name: test_cse_in_legalizer
body: |
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -O0 -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
---
name: test_ext
body: |
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store-fewerElts.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store-fewerElts.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store-fewerElts.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store-fewerElts.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=aarch64 -o - -run-pass=legalizer %s | FileCheck %s
+# RUN: llc -O0 -march=aarch64 -o - -run-pass=legalizer %s | FileCheck %s
---
name: load_v4s32
legalized: false
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store-s128-unaligned.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store-s128-unaligned.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store-s128-unaligned.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store-s128-unaligned.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=aarch64 -o - -run-pass=legalizer %s | FileCheck %s
+# RUN: llc -O0 -march=aarch64 -o - -run-pass=legalizer %s | FileCheck %s
---
name: loadstore128_align4
exposesReturnsTwice: false
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -O0 -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
---
name: test_load
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir Thu Jan 24 15:11:25 2019
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-unknown-unknown -verify-machineinstrs -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -O0 -mtriple=aarch64-unknown-unknown -verify-machineinstrs -run-pass=legalizer %s -o - | FileCheck %s
--- |
; ModuleID = '/tmp/test.ll'
source_filename = "/tmp/test.ll"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -O0 -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
---
name: test_urem_64
body: |
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -O0 -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
---
name: test_shift
body: |
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -O0 -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
---
name: test_simple
body: |
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -O0 -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck %s
---
name: test_sext_s32_to_s64
Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple arm-linux-gnueabi -mattr=+v5t -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,CLZ
-# RUN: llc -mtriple arm-linux-gnueabi -mattr=-v5t -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,LIBCALLS
+# RUN: llc -O0 -mtriple arm-linux-gnueabi -mattr=+v5t -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,CLZ
+# RUN: llc -O0 -mtriple arm-linux-gnueabi -mattr=-v5t -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,LIBCALLS
--- |
define void @test_ctlz_s32() { ret void }
define void @test_ctlz_zero_undef_s32() { ret void }
Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir Thu Jan 24 15:11:25 2019
@@ -1,7 +1,7 @@
-# RUN: llc -mtriple arm-linux-gnueabi -mattr=+hwdiv-arm -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,HWDIV
-# RUN: llc -mtriple arm-linux-gnueabi -mattr=-hwdiv-arm -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,SOFT,SOFT-AEABI
-# RUN: llc -mtriple arm-linux-gnu -mattr=+hwdiv-arm -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,HWDIV
-# RUN: llc -mtriple arm-linux-gnu -mattr=-hwdiv-arm -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,SOFT,SOFT-DEFAULT
+# RUN: llc -O0 -mtriple arm-linux-gnueabi -mattr=+hwdiv-arm -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,HWDIV
+# RUN: llc -O0 -mtriple arm-linux-gnueabi -mattr=-hwdiv-arm -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,SOFT,SOFT-AEABI
+# RUN: llc -O0 -mtriple arm-linux-gnu -mattr=+hwdiv-arm -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,HWDIV
+# RUN: llc -O0 -mtriple arm-linux-gnu -mattr=-hwdiv-arm -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,SOFT,SOFT-DEFAULT
--- |
define void @test_sdiv_i32() { ret void }
define void @test_udiv_i32() { ret void }
Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir Thu Jan 24 15:11:25 2019
@@ -1,6 +1,6 @@
-# RUN: llc -mtriple arm-linux-gnueabihf -mattr=+vfp2 -float-abi=hard -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix HARD
-# RUN: llc -mtriple arm-linux-gnueabi -mattr=+vfp2,+soft-float -float-abi=soft -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT -check-prefix SOFT-AEABI
-# RUN: llc -mtriple arm-linux-gnu -mattr=+soft-float -float-abi=soft -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT -check-prefix SOFT-DEFAULT
+# RUN: llc -O0 -mtriple arm-linux-gnueabihf -mattr=+vfp2 -float-abi=hard -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix HARD
+# RUN: llc -O0 -mtriple arm-linux-gnueabi -mattr=+vfp2,+soft-float -float-abi=soft -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT -check-prefix SOFT-AEABI
+# RUN: llc -O0 -mtriple arm-linux-gnu -mattr=+soft-float -float-abi=soft -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT -check-prefix SOFT-DEFAULT
--- |
define void @test_frem_float() { ret void }
define void @test_frem_double() { ret void }
Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll Thu Jan 24 15:11:25 2019
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple arm-unknown -mattr=+vfp2,+v4t -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=ARM -check-prefix=LITTLE
-; RUN: llc -mtriple armeb-unknown -mattr=+vfp2,+v4t -global-isel -global-isel-abort=0 -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=ARM -check-prefix=BIG
+; RUN: llc -O0 -mtriple arm-unknown -mattr=+vfp2,+v4t -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=ARM -check-prefix=LITTLE
+; RUN: llc -O0 -mtriple armeb-unknown -mattr=+vfp2,+v4t -global-isel -global-isel-abort=0 -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=ARM -check-prefix=BIG
; XFAIL: armeb
-; RUN: llc -mtriple thumb-unknown -mattr=+vfp2,+v6t2 -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=LITTLE -check-prefix=THUMB
+; RUN: llc -O0 -mtriple thumb-unknown -mattr=+vfp2,+v6t2 -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=LITTLE -check-prefix=THUMB
declare arm_aapcscc i32* @simple_reg_params_target(i32, i32*)
Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/callingconv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/callingconv.ll?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/callingconv.ll (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/callingconv.ll Thu Jan 24 15:11:25 2019
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-linux-gnu -mattr=+sse2 -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
+; RUN: llc -enable-cse-in-irtranslator=0 -enable-cse-in-legalizer=0 -mtriple=i386-linux-gnu -mattr=+sse2 -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
+; RUN: llc -enable-cse-in-irtranslator=0 -enable-cse-in-legalizer=0 -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
define i32 @test_ret_i32() {
; X32-LABEL: test_ret_i32:
Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll Thu Jan 24 15:11:25 2019
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; RUN: llc -mtriple=i386-linux-gnu -mattr=+sse2 -global-isel -stop-after=irtranslator < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -stop-after=irtranslator < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
+; RUN: llc -O0 -mtriple=i386-linux-gnu -mattr=+sse2 -global-isel -stop-after=irtranslator < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
+; RUN: llc -O0 -mtriple=x86_64-linux-gnu -global-isel -stop-after=irtranslator < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
@a1_8bit = external global i8
@a7_8bit = external global i8
Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-add.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-add.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-add.mir (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-add.mir Thu Jan 24 15:11:25 2019
@@ -1,6 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
-# RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
+# RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
+# RUN: llc -O0 -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
--- |
define void @test_add_i1() { ret void}
Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-and-scalar.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-and-scalar.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-and-scalar.mir (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-and-scalar.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
--- |
define i1 @test_and_i1() {
Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-ext-x86-64.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-ext-x86-64.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-ext-x86-64.mir (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-ext-x86-64.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
--- |
define i64 @test_sext_i1(i8 %a) {
Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir Thu Jan 24 15:11:25 2019
@@ -1,6 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
-# RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
+# RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
+# RUN: llc -O0 -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
--- |
define void @test_memop_s8tos32() {
Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
--- |
define void @test_mul_i1() { ret void}
Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-or-scalar.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-or-scalar.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-or-scalar.mir (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-or-scalar.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
--- |
define i1 @test_or_i1() {
Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-sub.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-sub.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-sub.mir (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-sub.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
--- |
Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-trunc.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-trunc.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-trunc.mir (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-trunc.mir Thu Jan 24 15:11:25 2019
@@ -1,6 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
+# RUN: llc -O0 -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
+# RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
--- |
define void @trunc_check() {
ret void
Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-xor-scalar.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-xor-scalar.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-xor-scalar.mir (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/legalize-xor-scalar.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
--- |
define i1 @test_xor_i1() {
Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-legalize-sitofp.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-legalize-sitofp.mir?rev=352126&r1=352125&r2=352126&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-legalize-sitofp.mir (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-legalize-sitofp.mir Thu Jan 24 15:11:25 2019
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
+# RUN: llc -O0 -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
--- |
; ModuleID = 'sitofp.ll'
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