[PATCH] D57099: [MIPS GlobalISel] Select zero extending and sign extending load

[Petar Avramovic via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL352038: [MIPS GlobalISel] Select zero extending and sign extending load (authored by Petar.Avramovic, committed by ).
Herald added subscribers: llvm-commits, jrtc27.

Changed prior to commit:
  https://reviews.llvm.org/D57099?vs=183096&id=183274#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D57099/new/

https://reviews.llvm.org/D57099

Files:
  llvm/trunk/lib/Target/Mips/MipsInstructionSelector.cpp
  llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp
  llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.cpp
  llvm/trunk/test/CodeGen/Mips/GlobalISel/instruction-select/zextLoad_and_sextLoad.mir
  llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/zextLoad_and_sextLoad.mir
  llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/zextLoad_and_sextLoad.ll
  llvm/trunk/test/CodeGen/Mips/GlobalISel/regbankselect/zextLoad_and_sextLoad.mir

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