[PATCH] D57054: [MachineOutliner][ARM][RFC] Add Machine Outliner support for ARM

Yvan Roux via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 22 06:39:51 PST 2019


yroux created this revision.
yroux added reviewers: paquette, t.p.northover, greened, SjoerdMeijer.
Herald added subscribers: kristof.beyls, javed.absar.

Here is a proposal for Machine Outliner support on ARM targets.  It is based on
the AArch64 implementation, and almost up-to-date with it.  This implementation
is not intended to be checked-in as it, but is made available for testing and
feedback.

What are the differencies with AArch64 implementation?

- ARM backend contains a Constant Island pass which splits constant pools inside functions, this pass needs to be made after the Machine Outliner to avoid the distance increase between the islands and the constant usage inside outlined functions and the potential breakage.
- Handling of ARM, Thumb2 and Thumb1 code generation.
- Branch instructions can be conditional in ARM, only unconditional ones can be outlined as a basic block terminator.
- PIC instructions (i.e PICADD, ...) contain labels, and can't be outlined since offset computing would be broken.
- Only one commit from the AArch64 implementation is missing, it's the one which moves the stack instructions check logic into getOutliningCandidateInfo, I plan to replicate it here, but it can be done later.

What is the status?

- ARM and Thumb2 are implemented and tested, LLVM+Clang was bootstrapped with the machine outliner turned on, regression testsuite passed with failures (clang binary code size is reduced by ~6% for ARM and ~3.5% for Thumb2)
- Thumb1 is handled but not fully tested yet.

What is missing and needs to be done before check-in?

- More testcases should be added in particular MIR ones to check stack fix-ups, ...
- The patch can be splitted, I don't really see how to do it for the support itself, but at least the move of the Constant Island pass and the properties added to the outlined functions (such that this pass can be run) can be contributed as a prerequisite.
- The up-comming comments should be addressed ;)


Repository:
  rL LLVM

https://reviews.llvm.org/D57054

Files:
  lib/CodeGen/MachineOutliner.cpp
  lib/Target/ARM/ARMBaseInstrInfo.cpp
  lib/Target/ARM/ARMBaseInstrInfo.h
  lib/Target/ARM/ARMTargetMachine.cpp
  test/CodeGen/ARM/machine-outliner-default.mir
  test/CodeGen/ARM/machine-outliner-tail.ll
  test/CodeGen/ARM/machine-outliner-thunk.ll
  test/CodeGen/ARM/machine-outliner.ll

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