[llvm] r351767 - AMDGPU/GlobalISel: Legalize more fp<->int conversions
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 21 16:20:17 PST 2019
Author: arsenm
Date: Mon Jan 21 16:20:17 2019
New Revision: 351767
URL: http://llvm.org/viewvc/llvm-project?rev=351767&view=rev
Log:
AMDGPU/GlobalISel: Legalize more fp<->int conversions
Added:
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp?rev=351767&r1=351766&r2=351767&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp Mon Jan 21 16:20:17 2019
@@ -163,17 +163,11 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo
.legalFor({{S64, S32}, {S32, S16}, {S64, S16},
{S32, S1}, {S64, S1}, {S16, S1}});
- setAction({G_FPTOSI, S32}, Legal);
- setAction({G_FPTOSI, 1, S32}, Legal);
+ getActionDefinitionsBuilder({G_SITOFP, G_UITOFP})
+ .legalFor({{S32, S32}, {S64, S32}});
- setAction({G_SITOFP, S32}, Legal);
- setAction({G_SITOFP, 1, S32}, Legal);
-
- setAction({G_UITOFP, S32}, Legal);
- setAction({G_UITOFP, 1, S32}, Legal);
-
- setAction({G_FPTOUI, S32}, Legal);
- setAction({G_FPTOUI, 1, S32}, Legal);
+ getActionDefinitionsBuilder({G_FPTOSI, G_FPTOUI})
+ .legalFor({{S32, S32}, {S32, S64}});
setAction({G_FPOW, S32}, Legal);
setAction({G_FEXP2, S32}, Legal);
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir?rev=351767&r1=351766&r2=351767&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir Mon Jan 21 16:20:17 2019
@@ -2,13 +2,25 @@
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck %s
---
-name: test_fptosi_f32_to_i32
+name: test_fptosi_s32_to_s32
body: |
bb.0:
liveins: $vgpr0
- ; CHECK-LABEL: name: test_fptosi_f32_to_i32
+ ; CHECK-LABEL: name: test_fptosi_s32_to_s32
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
%0:_(s32) = COPY $vgpr0
%1:_(s32) = G_FPTOSI %0
...
+
+---
+name: test_fptosi_s64_to_s32
+body: |
+ bb.0:
+ liveins: $vgpr0_vgpr1
+
+ ; CHECK-LABEL: name: test_fptosi_s64_to_s32
+ ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
+ %0:_(s64) = COPY $vgpr0_vgpr1
+ %1:_(s32) = G_FPTOSI %0
+...
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir?rev=351767&r1=351766&r2=351767&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir Mon Jan 21 16:20:17 2019
@@ -1,14 +1,33 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -run-pass=legalizer %s -o - | FileCheck %s
---
-name: test_fptoui
+name: test_fptoui_s32_s32
body: |
bb.0:
liveins: $vgpr0
- ; CHECK-LABEL: name: test_fptoui
- ; CHECK: %1:_(s32) = G_FPTOUI %0
+ ; CHECK-LABEL: name: test_fptoui_s32_s32
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; CHECK: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[COPY]](s32)
+ ; CHECK: $vgpr0 = COPY [[FPTOUI]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = G_FPTOUI %0
$vgpr0 = COPY %1
...
+
+---
+name: test_fptoui_s32_s64
+body: |
+ bb.0:
+ liveins: $vgpr0_vgpr1
+
+ ; CHECK-LABEL: name: test_fptoui_s32_s64
+ ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
+ ; CHECK: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[COPY]](s64)
+ ; CHECK: $vgpr0 = COPY [[FPTOUI]](s32)
+ %0:_(s64) = COPY $vgpr0_vgpr1
+ %1:_(s32) = G_FPTOUI %0
+ $vgpr0 = COPY %1
+...
+
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir?rev=351767&r1=351766&r2=351767&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir Mon Jan 21 16:20:17 2019
@@ -2,13 +2,32 @@
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel %s -o - | FileCheck %s
---
-name: test_sitofp_f32_to_i32
+name: test_sitofp_s32_to_s32
body: |
bb.0:
liveins: $vgpr0
- ; CHECK-LABEL: name: test_sitofp_f32_to_i32
+ ; CHECK-LABEL: name: test_sitofp_s32_to_s32
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; CHECK: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[COPY]](s32)
+ ; CHECK: $vgpr0 = COPY [[SITOFP]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = G_SITOFP %0
+ $vgpr0 = COPY %1
...
+
+---
+name: test_sitofp_s32_to_s64
+body: |
+ bb.0:
+ liveins: $vgpr0
+
+ ; CHECK-LABEL: name: test_sitofp_s32_to_s64
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; CHECK: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[COPY]](s32)
+ ; CHECK: $vgpr0_vgpr1 = COPY [[SITOFP]](s64)
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s64) = G_SITOFP %0
+ $vgpr0_vgpr1 = COPY %1
+...
+
Added: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir?rev=351767&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir Mon Jan 21 16:20:17 2019
@@ -0,0 +1,33 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel %s -o - | FileCheck %s
+
+---
+name: test_uitofp_s32_to_s32
+body: |
+ bb.0:
+ liveins: $vgpr0
+
+ ; CHECK-LABEL: name: test_uitofp_s32_to_s32
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; CHECK: [[UITOFP:%[0-9]+]]:_(s32) = G_UITOFP [[COPY]](s32)
+ ; CHECK: $vgpr0 = COPY [[UITOFP]](s32)
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s32) = G_UITOFP %0
+ $vgpr0 = COPY %1
+...
+
+---
+name: test_uitofp_s32_to_s64
+body: |
+ bb.0:
+ liveins: $vgpr0
+
+ ; CHECK-LABEL: name: test_uitofp_s32_to_s64
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; CHECK: [[UITOFP:%[0-9]+]]:_(s64) = G_UITOFP [[COPY]](s32)
+ ; CHECK: $vgpr0_vgpr1 = COPY [[UITOFP]](s64)
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s64) = G_UITOFP %0
+ $vgpr0_vgpr1 = COPY %1
+...
+
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