[PATCH] D56281: [DAGCombiner] reduce buildvec of zexted extracted element to shuffle

[Sanjay Patel via Phabricator via llvm-commits]

spatel added a comment.

In D56281#1365397 <https://reviews.llvm.org/D56281#1365397>, @SjoerdMeijer wrote:

> Hello. I am investigating a crash and this assertion failure on AArch64:
>
>   lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1548: llvm::SDValue llvm::SelectionDAG::getVectorShuffle(llvm::EVT, const llvm::SDLoc&, llvm::SDValue, llvm::SDValue, llvm::ArrayRef<int>): Assertion `VT.getVectorNumElements() == Mask.size() && "Must have the same number of vector elements as mask elements!"' failed.


I see the problem now: I forgot to verify that the build vector and the source vector of the extract element are the same size. Should have a fix committed soon.


Repository:
  rL LLVM

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https://reviews.llvm.org/D56281