[llvm] r351617 - Revert r351584: "GlobalISel: Verify g_zextload and g_sextload"

[Amara Emerson via llvm-commits]

Author: aemerson
Date: Fri Jan 18 16:36:11 2019
New Revision: 351617

URL: http://llvm.org/viewvc/llvm-project?rev=351617&view=rev
Log:
Revert r351584: "GlobalISel: Verify g_zextload and g_sextload"

This new assertion triggered on the AArch64 GlobalISel bots. Reverting while it's being investigated.

Removed:
    llvm/trunk/test/CodeGen/MIR/AArch64/invalid-extload.mir
Modified:
    llvm/trunk/lib/CodeGen/MachineVerifier.cpp

Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=351617&r1=351616&r2=351617&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Fri Jan 18 16:36:11 2019
@@ -986,24 +986,11 @@ void MachineVerifier::visitMachineInstrB
     break;
   case TargetOpcode::G_LOAD:
   case TargetOpcode::G_STORE:
-  case TargetOpcode::G_ZEXTLOAD:
-  case TargetOpcode::G_SEXTLOAD:
     // Generic loads and stores must have a single MachineMemOperand
     // describing that access.
-    if (!MI->hasOneMemOperand()) {
+    if (!MI->hasOneMemOperand())
       report("Generic instruction accessing memory must have one mem operand",
              MI);
-    } else {
-      if (MI->getOpcode() == TargetOpcode::G_ZEXTLOAD ||
-          MI->getOpcode() == TargetOpcode::G_SEXTLOAD) {
-        const MachineMemOperand &MMO = **MI->memoperands_begin();
-        LLT DstTy = MRI->getType(MI->getOperand(0).getReg());
-        if (MMO.getSize() * 8 >= DstTy.getSizeInBits()) {
-          report("Generic extload must have a narrower memory type", MI);
-        }
-      }
-    }
-
     break;
   case TargetOpcode::G_PHI: {
     LLT DstTy = MRI->getType(MI->getOperand(0).getReg());

Removed: llvm/trunk/test/CodeGen/MIR/AArch64/invalid-extload.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/AArch64/invalid-extload.mir?rev=351616&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/invalid-extload.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/AArch64/invalid-extload.mir (removed)
@@ -1,23 +0,0 @@
-# RUN: not llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s 2>&1 | FileCheck %s
-
-# CHECK: *** Bad machine code: Generic extload must have a narrower memory type ***
-# CHECK: *** Bad machine code: Generic extload must have a narrower memory type ***
-# CHECK: *** Bad machine code: Generic extload must have a narrower memory type ***
-# CHECK: *** Bad machine code: Generic extload must have a narrower memory type ***
-# CHECK: *** Bad machine code: Generic instruction accessing memory must have one mem operand ***
-# CHECK: *** Bad machine code: Generic instruction accessing memory must have one mem operand ***
-
----
-name: invalid_extload_memory_sizes
-body: |
-  bb.0:
-
-    %0:_(p0) = COPY $x0
-    %1:_(s64) = G_ZEXTLOAD %0(p0) :: (load 8)
-    %2:_(s64) = G_ZEXTLOAD %0(p0) :: (load 16)
-    %3:_(s64) = G_SEXTLOAD %0(p0) :: (load 8)
-    %4:_(s64) = G_SEXTLOAD %0(p0) :: (load 16)
-    %5:_(s64) = G_ZEXTLOAD %0(p0)
-    %6:_(s64) = G_SEXTLOAD %0(p0)
-
-...