[PATCH] D56534: [Verifier] Add verification of unaligned atomic load/store

[JF Bastien via Phabricator via llvm-commits]

jfb added a comment.

In D56534#1362171 <https://reviews.llvm.org/D56534#1362171>, @jyknight wrote:

> I believe that instead of this patch, the LangRef should be updated to say:
>
> 1. Misaligned atomics in the IR are allowed, and work correctly (but will most likely be inefficient).


This sounds fine. However, the premise of this patch IIUC was that LLVM might add unaligned atomics. Is this something we should worry about? If so, my original comment stands: the verifier should make sure the only unaligned atomic accesses came directly at the user's request.

> 2. Unless all accesses to a given byte of memory are done with the same address and size, there can be no guarantee of atomicity. (that is: no overlapping accesses, and no mixed-size accesses)

This is fairly handwavy, but in the right general direction. You have to talk about time or synchronization if you want this statement to be meaningful: e.g. memory locations can get reused and then it's fine to access them differently, or you can synchronize and use different access patterns and across this alignment changes don't matter.


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