[PATCH] D56828: [ELF] Make RW PT_LOAD start with PT_GNU_RELRO sections

[Fangrui Song via Phabricator via llvm-commits]

MaskRay created this revision.
MaskRay added a reviewer: ruiu.
Herald added subscribers: llvm-commits, arichardson, emaste.
Herald added a reviewer: espindola.

This ensures that after ld.so makes PT_GNU_RELRO read-only, its associated PT_LOAD splits into at most 2 maps (instead of 3 at present).

On the other hand, GNU strip before 2.31 discards PT_GNU_RELRO if its
address is not equal to the start of its associated PT_LOAD.
This has been fixed by https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=f2731e0c374e5323ce4cdae2bcc7b7fe22da1a6f
This patch makes lld-linked executable/DSO compatible with GNU strip
before 2.31


Repository:
  rLLD LLVM Linker

https://reviews.llvm.org/D56828

Files:
  ELF/Writer.cpp


Index: ELF/Writer.cpp
===================================================================
--- ELF/Writer.cpp
+++ ELF/Writer.cpp
@@ -729,15 +729,16 @@
 // * It is easy to check if a give branch was taken.
 // * It is easy two see how similar two ranks are (see getRankProximity).
 enum RankFlags {
-  RF_NOT_ADDR_SET = 1 << 18,
-  RF_NOT_ALLOC = 1 << 17,
-  RF_NOT_INTERP = 1 << 16,
-  RF_NOT_NOTE = 1 << 15,
-  RF_WRITE = 1 << 14,
-  RF_EXEC_WRITE = 1 << 13,
-  RF_EXEC = 1 << 12,
-  RF_RODATA = 1 << 11,
-  RF_NON_TLS_BSS = 1 << 10,
+  RF_NOT_ADDR_SET = 1 << 19,
+  RF_NOT_ALLOC = 1 << 18,
+  RF_NOT_INTERP = 1 << 17,
+  RF_NOT_NOTE = 1 << 16,
+  RF_WRITE = 1 << 15,
+  RF_EXEC_WRITE = 1 << 14,
+  RF_EXEC = 1 << 13,
+  RF_RODATA = 1 << 12,
+  RF_NON_TLS_BSS = 1 << 11,
+  RF_NON_RELRO = 1 << 10,
   RF_NON_TLS_BSS_RO = 1 << 9,
   RF_NOT_TLS = 1 << 8,
   RF_BSS = 1 << 7,
@@ -820,6 +821,12 @@
   if (IsNonTlsNoBits)
     Rank |= RF_NON_TLS_BSS;
 
+  // Place writable non-RELRO sections first so that the PT_LOAD starts with
+  // PT_GNU_RELRO sections, which ensures the PT_LOAD splits into at most 2
+  // maps at runtime.
+  if (IsWrite && !isRelroSection(Sec))
+    Rank |= RF_NON_RELRO;
+
   // We place nobits RelRo sections before plain r/w ones, and non-nobits RelRo
   // sections after r/w ones, so that the RelRo sections are contiguous.
   bool IsRelRo = isRelroSection(Sec);


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