[PATCH] D56784: [X86][SSE] Use PSLLDQ/PSRLDQ to mask out zeroable ends of a shuffle

[Sanjay Patel via Phabricator via llvm-commits]

spatel added a comment.

The double-shift cases look good, but I'm skeptical about the triple-shift. Wouldn't those always be better with an 'and' mask followed by shift? We reduce the dependent chain of vector ops and instruction count for the cost of a speculatable constant pool load.


Repository:
  rL LLVM

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  https://reviews.llvm.org/D56784/new/

https://reviews.llvm.org/D56784