[PATCH] D56454: AMDGPU: Adjust the chain for loads writing to the HI part of a register.

Changpeng Fang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 16 12:15:14 PST 2019


cfang updated this revision to Diff 182114.
cfang added a comment.

Update based on the comments from the reviewers:

1. add test that the lower half op does not have a chain, so we don't adjust the chain;
2. extend to every address space;
3. add tests for unrelated bases;
4. set the size of the small vector for Ops to 16.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56454/new/

https://reviews.llvm.org/D56454

Files:
  lib/Target/AMDGPU/SIISelLowering.cpp
  test/CodeGen/AMDGPU/chain-hi-to-lo.ll

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