[llvm] r351365 - [X86] getFauxShuffleMask - bail for non-byte aligned shuffle types

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Wed Jan 16 10:15:31 2019
New Revision: 351365

URL: http://llvm.org/viewvc/llvm-project?rev=351365&view=rev
Log:
[X86] getFauxShuffleMask - bail for non-byte aligned shuffle types

Remove the existing assertion and just return false for unexpected shuffle value types (<X x i1> mainly....).

Found while updating combineX86ShufflesRecursively to run within SimplifyDemandedVectorElts/SimplifyDemandedBits.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=351365&r1=351364&r2=351365&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Jan 16 10:15:31 2019
@@ -6483,8 +6483,8 @@ static bool getFauxShuffleMask(SDValue N
   unsigned NumElts = VT.getVectorNumElements();
   unsigned NumSizeInBits = VT.getSizeInBits();
   unsigned NumBitsPerElt = VT.getScalarSizeInBits();
-  assert((NumBitsPerElt % 8) == 0 && (NumSizeInBits % 8) == 0 &&
-         "Expected byte aligned value types");
+  if ((NumBitsPerElt % 8) != 0 || (NumSizeInBits % 8) != 0)
+    return false;
 
   unsigned Opcode = N.getOpcode();
   switch (Opcode) {