[PATCH] D56717: [SLH] AArch64: correctly pick temporary register to mask SP

[Oliver Stannard via Phabricator via llvm-commits]

olista01 requested changes to this revision.
olista01 added inline comments.
This revision now requires changes to proceed.


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Comment at: llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp:232
+                                                  unsigned PreferredReg) const {
+  // This function will only be called on either terminator instructions or on
+  // call instructions. The implementation makes use of that knowledge.
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I think this requires a return instruction, not just any terminator, because terminators could have other values live across them. I'm also not sure that it's correct for calls, which could have registers live across them, without using them directly.

Maybe we could use the RegScavenger here, which looks like it can also handle some more difficult cases by spilling a register to the stack?


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Comment at: llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp:252
+  }
+  llvm_unreachable("The nature of call instructions and the ABI must result in "
+                   "finding at least one register above.");
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This can be hit by this code:

  typedef int (*fptr_t)(void);
  int foo(fptr_t f) {
    register fptr_t f2 asm("x30") = f;
    asm("" : "+r"(f2));
    return f2() + 1;
  }

This uses inline assembly to force the function pointer into x30, but it is an allocatable register so I think it is possible for this to happen "naturally".


Repository:
  rL LLVM

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  https://reviews.llvm.org/D56717/new/

https://reviews.llvm.org/D56717