[PATCH] D56281: [DAGCombiner] reduce buildvec of zexted extracted element to shuffle
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 15 01:17:56 PST 2019
RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.
LGTM (with one pcg bug request).
================
Comment at: test/CodeGen/X86/buildvec-extract.ll:412
+; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,2,0,1,4,5,6,7]
+; SSE2-NEXT: retq
+;
----------------
Please can you raise a bug on this - we should do better for this shuffle.
================
Comment at: test/CodeGen/X86/buildvec-extract.ll:458
+; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,1,2,0,4,5,6,7]
+; SSE2-NEXT: retq
+;
----------------
Add this shuffle to the same bug - I think its the same culprit.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D56281/new/
https://reviews.llvm.org/D56281
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