[PATCH] D56706: GlobalISel: Combine trunc with constant
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 14 23:50:29 PST 2019
arsenm created this revision.
arsenm added reviewers: aditya_nandakumar, aemerson, dsanders.
Herald added subscribers: tpr, kristof.beyls, rovka, nhaehnle, wdng, jvesely.
Fixes up the legalization created by requiring
a 32-bit shift amount type when producing a 64-bit
shift on AMDGPU.
https://reviews.llvm.org/D56706
Files:
include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
test/CodeGen/AMDGPU/GlobalISel/combine-ext-legalizer.mir
test/CodeGen/X86/GlobalISel/add-ext.ll
test/CodeGen/X86/GlobalISel/ashr-scalar.ll
test/CodeGen/X86/GlobalISel/ext-x86-64.ll
test/CodeGen/X86/GlobalISel/ext.ll
test/CodeGen/X86/GlobalISel/gep.ll
test/CodeGen/X86/GlobalISel/legalize-ext-x86-64.mir
test/CodeGen/X86/GlobalISel/lshr-scalar.ll
test/CodeGen/X86/GlobalISel/shl-scalar.ll
test/CodeGen/X86/GlobalISel/x86_64-legalize-sitofp.mir
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