[PATCH] D56052: X86DAGToDAGISel::matchBitExtract() with truncation (PR36419)
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 14 14:23:31 PST 2019
lebedev.ri marked 2 inline comments as done.
lebedev.ri added inline comments.
================
Comment at: lib/Target/X86/X86ISelDAGToDAG.cpp:2822
+ MVT XVT = NVT;
+ if (!Subtarget->hasBMI2() && X.getOpcode() == ISD::TRUNCATE &&
+ X.getOperand(0).getOpcode() == ISD::SRL) {
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craig.topper wrote:
> Should we ensure the truncate input has only one use?
Hm, since we only take that branch in BMI1's case, it would be consistent with the rest of the one-use checks,
so i guess we should, yes. Will do.
================
Comment at: test/CodeGen/X86/extract-bits.ll:1832
+; X64-BMI1NOTBM-NEXT: # kill: def $edx killed $edx def $rdx
+; X64-BMI1NOTBM-NEXT: shlq $8, %rdx
+; X64-BMI1NOTBM-NEXT: movzbl %sil, %eax
----------------
One more thing is that 'control' being calculated as i64, while we only care about low 32 bits.
Will take a look, but not in this patch.
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D56052/new/
https://reviews.llvm.org/D56052
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