[PATCH] D56032: [ARM] Combine ands+lsls to lsls+lsrs for Thumb1.

[Dave Green via Phabricator via llvm-commits]

dmgreen added reviewers: SjoerdMeijer, samparker.
dmgreen added a comment.

Sounds good to me. Just adding Sjoerd/Sam who might know more about this code.



================
Comment at: lib/Target/ARM/ARMISelLowering.cpp:10424
 
-  if (Subtarget->isThumb() && Subtarget->isThumb1Only())
+  if (Subtarget->isThumb() && Subtarget->isThumb1Only()) {
+    // Avoid making expensive immediates by commuting shifts. (This logic
----------------
isThumb1Only implies isThumb already?


================
Comment at: lib/Target/ARM/ARMISelLowering.cpp:12460
 
+  if (ST->isThumb1Only() &&
+      N->getOpcode() == ISD::SHL && VT == MVT::i32 &&
----------------
Formatting?


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56032/new/

https://reviews.llvm.org/D56032