[PATCH] D56457: [WebAssembly][FastISel] Do not assume naive CmpInst lowering

[Heejin Ahn via Phabricator via llvm-commits]

aheejin added inline comments.


================
Comment at: test/CodeGen/WebAssembly/PR40172.ll:7
+; test case FastISel falls back to DAG ISel, which combines away the
+; comparison, invalidating FastISel's assumption.
+
----------------
I didn't quite understand what happened, so I ran the current code over this test case. Right after instruction selection, the mir code is

```
bb.0 (%ir-block.0):
  liveins: $arguments
  %0:i32 = ARGUMENT_i32 0, implicit $arguments
  %12:i32 = CONST_I32 2, implicit-def $arguments
  %6:i32 = COPY %0:i32
  %16:i32 = CONST_I32 2, implicit-def dead $arguments
  %9:i32 = AND_I32 %0:i32, killed %16:i32, implicit-def dead $arguments
  %10:i32 = CONST_I32 255, implicit-def $arguments
  %11:i32 = AND_I32 %9:i32, %10:i32, implicit-def $arguments
  %13:i32 = CONST_I32 255, implicit-def $arguments
  %14:i32 = AND_I32 %12:i32, %13:i32, implicit-def $arguments
  %15:i32 = EQ_I32 %11:i32, %14:i32, implicit-def $arguments

  // Following two lines are added by this patch
  %7:i32 = CONST_I32 1, implicit-def $arguments
  %8:i32 = AND_I32 %6:i32, %7:i32, implicit-def $arguments

  STORE8_I32 0, 0, %stack.0.t, %8:i32, implicit-def $arguments :: (store 1 into %ir.x8)

  // Following two lines are added by this patch
  %3:i32 = CONST_I32 1, implicit-def $arguments
  %4:i32 = AND_I32 %15:i32, %3:i32, implicit-def $arguments

  STORE8_I32 0, 1, %stack.0.t, %4:i32, implicit-def $arguments :: (store 1 into %ir.x10)

  RETURN_VOID implicit-def $arguments  
```

The values (registers) that are newly masked are %6 and %15, where %6 is an argument
```
  %0:i32 = ARGUMENT_i32 0, implicit $arguments
  %6:i32 = COPY %0:i32
```
and %15 is a result of `EQ_i32`.
```
  %15:i32 = EQ_I32 %11:i32, %14:i32, implicit-def $arguments
```

The argument does not seem to have a reason not to be i1, and also isn't the result of `EQ` supposed to be i1 as well..? I think I'm missing something.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56457/new/

https://reviews.llvm.org/D56457