[PATCH] D56616: [AArch64] Explicitly use v1i64 type for llvm.aarch64.neon.abs.i64 .

[Eli Friedman via Phabricator via llvm-commits]

efriedma created this revision.
efriedma added reviewers: RKSimon, SjoerdMeijer.
Herald added subscribers: kristof.beyls, javed.absar.

Otherwise, with D56544 <https://reviews.llvm.org/D56544>, the intrinsic will be expanded to an integer csel, which is probably not what the user expected.  This matches the general convention of using "v1" types to represent scalar integer operations in vector registers.

While I'm here, also add some error checking so we don't generate illegal ABS nodes.


Repository:
  rL LLVM

https://reviews.llvm.org/D56616

Files:
  lib/Target/AArch64/AArch64ISelLowering.cpp


Index: lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- lib/Target/AArch64/AArch64ISelLowering.cpp
+++ lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -2716,9 +2716,19 @@
     EVT PtrVT = getPointerTy(DAG.getDataLayout());
     return DAG.getNode(AArch64ISD::THREAD_POINTER, dl, PtrVT);
   }
-  case Intrinsic::aarch64_neon_abs:
-    return DAG.getNode(ISD::ABS, dl, Op.getValueType(),
-                       Op.getOperand(1));
+  case Intrinsic::aarch64_neon_abs: {
+    EVT Ty = Op.getValueType();
+    if (Ty == MVT::i64) {
+      SDValue Result = DAG.getNode(ISD::BITCAST, dl, MVT::v1i64,
+                                   Op.getOperand(1));
+      Result = DAG.getNode(ISD::ABS, dl, MVT::v1i64, Result);
+      return DAG.getNode(ISD::BITCAST, dl, MVT::i64, Result);
+    } else if (Ty.isVector() && Ty.isInteger() && isTypeLegal(Ty)) {
+      return DAG.getNode(ISD::ABS, dl, Ty, Op.getOperand(1));
+    } else {
+      report_fatal_error("Unexpected type for AArch64 NEON intrinic");
+    }
+  }
   case Intrinsic::aarch64_neon_smax:
     return DAG.getNode(ISD::SMAX, dl, Op.getValueType(),
                        Op.getOperand(1), Op.getOperand(2));


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D56616.181348.patch
Type: text/x-patch
Size: 1227 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190111/d9b4aa53/attachment.bin>