[llvm] r350951 - [Legalizer] Use correct ValueType of SELECT_CC node during Float promotion
Pirama Arumuga Nainar via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 11 10:46:02 PST 2019
Author: pirama
Date: Fri Jan 11 10:46:02 2019
New Revision: 350951
URL: http://llvm.org/viewvc/llvm-project?rev=350951&view=rev
Log:
[Legalizer] Use correct ValueType of SELECT_CC node during Float promotion
Summary:
When legalizing the result of a SELECT_CC node by promoting the
floating-point type, use the promoted-to type rather than the original
type.
Fix PR40273.
Reviewers: efriedma, majnemer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D56566
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
llvm/trunk/test/CodeGen/X86/half.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=350951&r1=350950&r2=350951&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Fri Jan 11 10:46:02 2019
@@ -2143,9 +2143,9 @@ SDValue DAGTypeLegalizer::PromoteFloatRe
SDValue TrueVal = GetPromotedFloat(N->getOperand(2));
SDValue FalseVal = GetPromotedFloat(N->getOperand(3));
- return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0),
- N->getOperand(0), N->getOperand(1), TrueVal, FalseVal,
- N->getOperand(4));
+ return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
+ TrueVal.getNode()->getValueType(0), N->getOperand(0),
+ N->getOperand(1), TrueVal, FalseVal, N->getOperand(4));
}
// Construct a SDNode that transforms the SINT or UINT operand to the promoted
Modified: llvm/trunk/test/CodeGen/X86/half.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/half.ll?rev=350951&r1=350950&r2=350951&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/half.ll (original)
+++ llvm/trunk/test/CodeGen/X86/half.ll Fri Jan 11 10:46:02 2019
@@ -938,4 +938,67 @@ define float @test_sitofp_fadd_i32(i32 %
ret float %tmp3
}
+define half @PR40273(half) #0 {
+; CHECK-LIBCALL-LABEL: PR40273:
+; CHECK-LIBCALL: # %bb.0:
+; CHECK-LIBCALL-NEXT: pushq %rax
+; CHECK-LIBCALL-NEXT: callq __gnu_f2h_ieee
+; CHECK-LIBCALL-NEXT: movzwl %ax, %edi
+; CHECK-LIBCALL-NEXT: callq __gnu_h2f_ieee
+; CHECK-LIBCALL-NEXT: xorps %xmm1, %xmm1
+; CHECK-LIBCALL-NEXT: ucomiss %xmm1, %xmm0
+; CHECK-LIBCALL-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; CHECK-LIBCALL-NEXT: jne .LBB17_3
+; CHECK-LIBCALL-NEXT: # %bb.1:
+; CHECK-LIBCALL-NEXT: jp .LBB17_3
+; CHECK-LIBCALL-NEXT: # %bb.2:
+; CHECK-LIBCALL-NEXT: xorps %xmm0, %xmm0
+; CHECK-LIBCALL-NEXT: .LBB17_3:
+; CHECK-LIBCALL-NEXT: popq %rax
+; CHECK-LIBCALL-NEXT: retq
+;
+; BWON-F16C-LABEL: PR40273:
+; BWON-F16C: # %bb.0:
+; BWON-F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; BWON-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
+; BWON-F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; BWON-F16C-NEXT: vucomiss %xmm1, %xmm0
+; BWON-F16C-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; BWON-F16C-NEXT: jne .LBB17_3
+; BWON-F16C-NEXT: # %bb.1:
+; BWON-F16C-NEXT: jp .LBB17_3
+; BWON-F16C-NEXT: # %bb.2:
+; BWON-F16C-NEXT: vxorps %xmm0, %xmm0, %xmm0
+; BWON-F16C-NEXT: .LBB17_3:
+; BWON-F16C-NEXT: retq
+;
+; CHECK-I686-LABEL: PR40273:
+; CHECK-I686: # %bb.0:
+; CHECK-I686-NEXT: subl $12, %esp
+; CHECK-I686-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; CHECK-I686-NEXT: movss %xmm0, (%esp)
+; CHECK-I686-NEXT: calll __gnu_f2h_ieee
+; CHECK-I686-NEXT: movzwl %ax, %eax
+; CHECK-I686-NEXT: movl %eax, (%esp)
+; CHECK-I686-NEXT: calll __gnu_h2f_ieee
+; CHECK-I686-NEXT: fstps {{[0-9]+}}(%esp)
+; CHECK-I686-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; CHECK-I686-NEXT: xorps %xmm1, %xmm1
+; CHECK-I686-NEXT: ucomiss %xmm1, %xmm0
+; CHECK-I686-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; CHECK-I686-NEXT: jne .LBB17_3
+; CHECK-I686-NEXT: # %bb.1:
+; CHECK-I686-NEXT: jp .LBB17_3
+; CHECK-I686-NEXT: # %bb.2:
+; CHECK-I686-NEXT: xorps %xmm0, %xmm0
+; CHECK-I686-NEXT: .LBB17_3:
+; CHECK-I686-NEXT: movss %xmm0, {{[0-9]+}}(%esp)
+; CHECK-I686-NEXT: flds {{[0-9]+}}(%esp)
+; CHECK-I686-NEXT: addl $12, %esp
+; CHECK-I686-NEXT: retl
+ %2 = fcmp une half %0, 0xH0000
+ %3 = uitofp i1 %2 to half
+ ret half %3
+}
+
attributes #0 = { nounwind }
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