[PATCH] D56544: [X86][AARCH64] Improve ISD::ABS support

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


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Comment at: test/CodeGen/AArch64/iabs.ll:46
+; CHECK-NEXT:  abs d0, d0
+; CHECK-NEXT:  fmov x0, d0
 ; CHECK-NEXT:  ret
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This sequence is legal, but it isn't actually a good idea; the new sequence is one instruction longer, and has much higher latency.

AArch64TargetLowering::LowerINTRINSIC_WO_CHAIN should probably generate a v1i64 ISD::ABS, not an i64 ISD::ABS.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56544/new/

https://reviews.llvm.org/D56544