[PATCH] D56474: [ARM] [NEON] Add ROTR/ROTL lowering

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

I'm not sure this is really the best approach... essentially, there are two relevant transforms here:

1. A rotate by a multiple of 8 can be transformed into a shuffle.  I guess the only case that's really relevant on ARM is vrev, since there aren't any other single-instruction shifts that correspond to a rotate, so maybe it's okay to just special-case here.
2. `(OR X, (SRL Y, N))` can be transformed to VSRI if X has enough known trailing zeros.  You can special-case rotates (or slightly more generally, FSHL/FSHR), but it's not much harder to handle the general case.

I'm also a little concerned that the VSRI could actually be slower in certain cases... if you look at timings for a Cortex-A57, 128-bit VSRI takes two cycles throughput to execute, as opposed to one for a regular shift.



================
Comment at: lib/Target/ARM/ARMISelLowering.cpp:8064
+      default: // don't know how we got here...
+        goto normal;
+     }
----------------
llvm_unreachable; there isn't any other possible vector type.


Repository:
  rL LLVM

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https://reviews.llvm.org/D56474