[llvm] r350702 - [AArch64] Move feature predctrl to predres
Diogo N. Sampaio via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 9 03:24:15 PST 2019
Author: dnsampaio
Date: Wed Jan 9 03:24:15 2019
New Revision: 350702
URL: http://llvm.org/viewvc/llvm-project?rev=350702&view=rev
Log:
[AArch64] Move feature predctrl to predres
Follow up patch of rL350385, for adding predres
command line option. This patch renames the
feature as to keep it aligned with the option
passed by/to clang
Differential Revision: https://reviews.llvm.org/D56484
Added:
llvm/trunk/test/MC/AArch64/armv8.5a-predres-error.s
- copied, changed from r350701, llvm/trunk/test/MC/AArch64/armv8.5a-predctrl-error.s
llvm/trunk/test/MC/AArch64/armv8.5a-predres.s
- copied, changed from r350701, llvm/trunk/test/MC/AArch64/armv8.5a-predctrl.s
llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-predres.txt
- copied, changed from r350701, llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt
Removed:
llvm/trunk/test/MC/AArch64/armv8.5a-predctrl-error.s
llvm/trunk/test/MC/AArch64/armv8.5a-predctrl.s
llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt
Modified:
llvm/trunk/lib/Target/AArch64/AArch64.td
llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h
llvm/trunk/lib/Target/AArch64/AArch64SystemOperands.td
llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
Modified: llvm/trunk/lib/Target/AArch64/AArch64.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64.td?rev=350702&r1=350701&r2=350702&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64.td Wed Jan 9 03:24:15 2019
@@ -312,8 +312,8 @@ def FeatureSB : SubtargetFeature<"sb", "
def FeatureSSBS : SubtargetFeature<"ssbs", "HasSSBS",
"true", "Enable Speculative Store Bypass Safe bit" >;
-def FeaturePredCtrl : SubtargetFeature<"predctrl", "HasPredCtrl", "true",
- "Enable execution and data prediction invalidation instructions" >;
+def FeaturePredRes : SubtargetFeature<"predres", "HasPredRes", "true",
+ "Enable v8.5a execution and data prediction invalidation instructions" >;
def FeatureCacheDeepPersist : SubtargetFeature<"ccdp", "HasCCDP",
"true", "Enable v8.5 Cache Clean to Point of Deep Persistence" >;
@@ -352,7 +352,7 @@ def HasV8_4aOps : SubtargetFeature<"v8.4
def HasV8_5aOps : SubtargetFeature<
"v8.5a", "HasV8_5aOps", "true", "Support ARM v8.5a instructions",
[HasV8_4aOps, FeatureAltFPCmp, FeatureFRInt3264, FeatureSpecRestrict,
- FeatureSSBS, FeatureSB, FeaturePredCtrl, FeatureCacheDeepPersist,
+ FeatureSSBS, FeatureSB, FeaturePredRes, FeatureCacheDeepPersist,
FeatureBranchTargetId]
>;
Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td?rev=350702&r1=350701&r2=350702&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td Wed Jan 9 03:24:15 2019
@@ -116,8 +116,8 @@ def HasFRInt3264 : Predicate<"Subtar
AssemblerPredicate<"FeatureFRInt3264", "frint3264">;
def HasSB : Predicate<"Subtarget->hasSB()">,
AssemblerPredicate<"FeatureSB", "sb">;
-def HasPredCtrl : Predicate<"Subtarget->hasPredCtrl()">,
- AssemblerPredicate<"FeaturePredCtrl", "predctrl">;
+def HasPredRes : Predicate<"Subtarget->hasPredRes()">,
+ AssemblerPredicate<"FeaturePredRes", "predres">;
def HasCCDP : Predicate<"Subtarget->hasCCDP()">,
AssemblerPredicate<"FeatureCacheDeepPersist", "ccdp">;
def HasBTI : Predicate<"Subtarget->hasBTI()">,
Modified: llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h?rev=350702&r1=350701&r2=350702&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h Wed Jan 9 03:24:15 2019
@@ -128,7 +128,7 @@ protected:
bool HasSpecRestrict = false;
bool HasSSBS = false;
bool HasSB = false;
- bool HasPredCtrl = false;
+ bool HasPredRes = false;
bool HasCCDP = false;
bool HasBTI = false;
bool HasRandGen = false;
@@ -357,7 +357,7 @@ public:
bool hasSpecRestrict() const { return HasSpecRestrict; }
bool hasSSBS() const { return HasSSBS; }
bool hasSB() const { return HasSB; }
- bool hasPredCtrl() const { return HasPredCtrl; }
+ bool hasPredRes() const { return HasPredRes; }
bool hasCCDP() const { return HasCCDP; }
bool hasBTI() const { return HasBTI; }
bool hasRandGen() const { return HasRandGen; }
Modified: llvm/trunk/lib/Target/AArch64/AArch64SystemOperands.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64SystemOperands.td?rev=350702&r1=350701&r2=350702&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64SystemOperands.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64SystemOperands.td Wed Jan 9 03:24:15 2019
@@ -501,7 +501,7 @@ class PRCTX<string name, bits<4> crm> :
code Requires = [{ {} }];
}
-let Requires = [{ {AArch64::FeaturePredCtrl} }] in {
+let Requires = [{ {AArch64::FeaturePredRes} }] in {
def : PRCTX<"RCTX", 0b0011>;
}
Modified: llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp?rev=350702&r1=350701&r2=350702&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp Wed Jan 9 03:24:15 2019
@@ -2826,7 +2826,7 @@ static const struct Extension {
{"simd", {AArch64::FeatureNEON}},
{"ras", {AArch64::FeatureRAS}},
{"lse", {AArch64::FeatureLSE}},
- {"predctrl", {AArch64::FeaturePredCtrl}},
+ {"predres", {AArch64::FeaturePredRes}},
{"ccdp", {AArch64::FeatureCacheDeepPersist}},
{"mte", {AArch64::FeatureMTE}},
{"tlb-rmi", {AArch64::FeatureTLB_RMI}},
Removed: llvm/trunk/test/MC/AArch64/armv8.5a-predctrl-error.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/armv8.5a-predctrl-error.s?rev=350701&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/armv8.5a-predctrl-error.s (original)
+++ llvm/trunk/test/MC/AArch64/armv8.5a-predctrl-error.s (removed)
@@ -1,20 +0,0 @@
-// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+predctrl < %s 2>&1| FileCheck %s
-
-cfp rctx
-dvp rctx
-cpp rctx
-
-// CHECK: specified cfp op requires a register
-// CHECK: specified dvp op requires a register
-// CHECK: specified cpp op requires a register
-
-cfp x0, x1
-dvp x1, x2
-cpp x2, x3
-
-// CHECK: invalid operand for prediction restriction instruction
-// CHECK-NEXT: cfp
-// CHECK: invalid operand for prediction restriction instruction
-// CHECK-NEXT: dvp
-// CHECK: invalid operand for prediction restriction instruction
-// CHECK-NEXT: cpp
Removed: llvm/trunk/test/MC/AArch64/armv8.5a-predctrl.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/armv8.5a-predctrl.s?rev=350701&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/armv8.5a-predctrl.s (original)
+++ llvm/trunk/test/MC/AArch64/armv8.5a-predctrl.s (removed)
@@ -1,18 +0,0 @@
-// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+predctrl < %s | FileCheck %s
-// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.5a < %s | FileCheck %s
-// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=-predctrl < %s 2>&1 | FileCheck %s --check-prefix=NOPREDCTRL
-
-cfp rctx, x0
-dvp rctx, x1
-cpp rctx, x2
-
-// CHECK: cfp rctx, x0 // encoding: [0x80,0x73,0x0b,0xd5]
-// CHECK: dvp rctx, x1 // encoding: [0xa1,0x73,0x0b,0xd5]
-// CHECK: cpp rctx, x2 // encoding: [0xe2,0x73,0x0b,0xd5]
-
-// NOPREDCTRL: CFPRCTX requires predctrl
-// NOPREDCTRL-NEXT: cfp
-// NOPREDCTRL: DVPRCTX requires predctrl
-// NOPREDCTRL-NEXT: dvp
-// NOPREDCTRL: CPPRCTX requires predctrl
-// NOPREDCTRL-NEXT: cpp
Copied: llvm/trunk/test/MC/AArch64/armv8.5a-predres-error.s (from r350701, llvm/trunk/test/MC/AArch64/armv8.5a-predctrl-error.s)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/armv8.5a-predres-error.s?p2=llvm/trunk/test/MC/AArch64/armv8.5a-predres-error.s&p1=llvm/trunk/test/MC/AArch64/armv8.5a-predctrl-error.s&r1=350701&r2=350702&rev=350702&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/armv8.5a-predctrl-error.s (original)
+++ llvm/trunk/test/MC/AArch64/armv8.5a-predres-error.s Wed Jan 9 03:24:15 2019
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+predctrl < %s 2>&1| FileCheck %s
+// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+predres < %s 2>&1| FileCheck %s
cfp rctx
dvp rctx
Copied: llvm/trunk/test/MC/AArch64/armv8.5a-predres.s (from r350701, llvm/trunk/test/MC/AArch64/armv8.5a-predctrl.s)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/armv8.5a-predres.s?p2=llvm/trunk/test/MC/AArch64/armv8.5a-predres.s&p1=llvm/trunk/test/MC/AArch64/armv8.5a-predctrl.s&r1=350701&r2=350702&rev=350702&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/armv8.5a-predctrl.s (original)
+++ llvm/trunk/test/MC/AArch64/armv8.5a-predres.s Wed Jan 9 03:24:15 2019
@@ -1,6 +1,6 @@
-// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+predctrl < %s | FileCheck %s
+// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+predres < %s | FileCheck %s
// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.5a < %s | FileCheck %s
-// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=-predctrl < %s 2>&1 | FileCheck %s --check-prefix=NOPREDCTRL
+// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=-predres < %s 2>&1 | FileCheck %s --check-prefix=NOPREDCTRL
cfp rctx, x0
dvp rctx, x1
@@ -10,9 +10,9 @@ cpp rctx, x2
// CHECK: dvp rctx, x1 // encoding: [0xa1,0x73,0x0b,0xd5]
// CHECK: cpp rctx, x2 // encoding: [0xe2,0x73,0x0b,0xd5]
-// NOPREDCTRL: CFPRCTX requires predctrl
+// NOPREDCTRL: CFPRCTX requires predres
// NOPREDCTRL-NEXT: cfp
-// NOPREDCTRL: DVPRCTX requires predctrl
+// NOPREDCTRL: DVPRCTX requires predres
// NOPREDCTRL-NEXT: dvp
-// NOPREDCTRL: CPPRCTX requires predctrl
+// NOPREDCTRL: CPPRCTX requires predres
// NOPREDCTRL-NEXT: cpp
Removed: llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt?rev=350701&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt (original)
+++ llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt (removed)
@@ -1,15 +0,0 @@
-# RUN: llvm-mc -triple=aarch64 -mattr=+predctrl -disassemble < %s | FileCheck %s
-# RUN: llvm-mc -triple=aarch64 -mattr=+v8.5a -disassemble < %s | FileCheck %s
-# RUN: llvm-mc -triple=aarch64 -mattr=-predctrl -disassemble < %s 2>&1 | FileCheck %s --check-prefix=NOSB
-
-[0x80 0x73 0x0b 0xd5]
-[0xa1 0x73 0x0b 0xd5]
-[0xe2 0x73 0x0b 0xd5]
-
-# CHECK: cfp rctx, x0
-# CHECK: dvp rctx, x1
-# CHECK: cpp rctx, x2
-
-# NOSB: sys #3, c7, c3, #4, x0
-# NOSB: sys #3, c7, c3, #5, x1
-# NOSB: sys #3, c7, c3, #7, x2
Copied: llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-predres.txt (from r350701, llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-predres.txt?p2=llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-predres.txt&p1=llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt&r1=350701&r2=350702&rev=350702&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt (original)
+++ llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-predres.txt Wed Jan 9 03:24:15 2019
@@ -1,6 +1,6 @@
-# RUN: llvm-mc -triple=aarch64 -mattr=+predctrl -disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple=aarch64 -mattr=+predres -disassemble < %s | FileCheck %s
# RUN: llvm-mc -triple=aarch64 -mattr=+v8.5a -disassemble < %s | FileCheck %s
-# RUN: llvm-mc -triple=aarch64 -mattr=-predctrl -disassemble < %s 2>&1 | FileCheck %s --check-prefix=NOSB
+# RUN: llvm-mc -triple=aarch64 -mattr=-predres -disassemble < %s 2>&1 | FileCheck %s --check-prefix=NOSB
[0x80 0x73 0x0b 0xd5]
[0xa1 0x73 0x0b 0xd5]
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