[PATCH] D56387: [DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE (WIP)
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 7 05:18:59 PST 2019
RKSimon added inline comments.
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Comment at: test/CodeGen/ARM/lowerMUL-newload.ll:28
; CHECK-NEXT: bx lr
entry:
; The test case trying to vectorize the pseudo code below.
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This just looks like we're missing something for the ARMISD::VMULL lowering
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Comment at: test/CodeGen/X86/avx512-any_extend_load.ll:53
; KNL-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0
-; KNL-NEXT: vpackuswb %xmm0, %xmm0, %xmm0
+; KNL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; KNL-NEXT: vmovq %xmm0, (%rdi)
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Simplifying to ANY_EXTEND prevents PACKSS/PACKUS from working
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Comment at: test/CodeGen/X86/combine-sra.ll:252
+; AVX2-SLOW-NEXT: vpsrlq $32, %ymm0, %ymm0
+; AVX2-SLOW-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
; AVX2-SLOW-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
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We'd been relying on the v4i64 ashr expansion
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Comment at: test/CodeGen/X86/vector-blend.ll:956
; SSE41-NEXT: movdqa %xmm0, %xmm2
+; SSE41-NEXT: andps {{.*}}(%rip), %xmm1
; SSE41-NEXT: pxor %xmm3, %xmm3
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Haven't worked out the problem here yet
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Comment at: test/CodeGen/X86/vector-trunc-widen.ll:77
+; AVX2-SLOW-NEXT: vpsrlq $32, %ymm0, %ymm0
+; AVX2-SLOW-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
+; AVX2-SLOW-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
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We'd been relying on the v8i64 ashr expansion
Repository:
rL LLVM
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https://reviews.llvm.org/D56387/new/
https://reviews.llvm.org/D56387
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