[llvm] r350475 - Added single use check to ShrinkDemandedConstant
Stanislav Mekhanoshin via llvm-commits
llvm-commits at lists.llvm.org
Sat Jan 5 11:20:00 PST 2019
Author: rampitec
Date: Sat Jan 5 11:20:00 2019
New Revision: 350475
URL: http://llvm.org/viewvc/llvm-project?rev=350475&view=rev
Log:
Added single use check to ShrinkDemandedConstant
Fixes cvt_f32_ubyte combine. performCvtF32UByteNCombine() could shrink
source node to demanded bits only even if there are other uses.
Differential Revision: https://reviews.llvm.org/D56289
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/trunk/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=350475&r1=350474&r2=350475&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Sat Jan 5 11:20:00 2019
@@ -350,6 +350,9 @@ bool TargetLowering::ShrinkDemandedConst
SDLoc DL(Op);
unsigned Opcode = Op.getOpcode();
+ if (!Op.hasOneUse())
+ return false;
+
// Do target-specific constant optimization.
if (targetShrinkDemandedConstant(Op, Demanded, TLO))
return TLO.New.getNode();
Modified: llvm/trunk/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll?rev=350475&r1=350474&r2=350475&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll Sat Jan 5 11:20:00 2019
@@ -281,3 +281,23 @@ define amdgpu_kernel void @extract_byte3
store float %cvt, float addrspace(1)* %out
ret void
}
+
+; GCN-LABEL: {{^}}cvt_ubyte0_or_multiuse:
+; GCN: {{buffer|flat}}_load_dword [[LOADREG:v[0-9]+]],
+; GCN-DAG: v_or_b32_e32 [[OR:v[0-9]+]], 0x80000001, [[LOADREG]]
+; GCN-DAG: v_cvt_f32_ubyte0_e32 [[CONV:v[0-9]+]], [[OR]]
+; GCN: v_add_f32_e32 [[RES:v[0-9]+]], [[OR]], [[CONV]]
+; GCN: buffer_store_dword [[RES]],
+define amdgpu_kernel void @cvt_ubyte0_or_multiuse(i32 addrspace(1)* %in, float addrspace(1)* %out) {
+bb:
+ %lid = tail call i32 @llvm.amdgcn.workitem.id.x()
+ %gep = getelementptr inbounds i32, i32 addrspace(1)* %in, i32 %lid
+ %load = load i32, i32 addrspace(1)* %gep
+ %or = or i32 %load, -2147483647
+ %and = and i32 %or, 255
+ %uitofp = uitofp i32 %and to float
+ %cast = bitcast i32 %or to float
+ %add = fadd float %cast, %uitofp
+ store float %add, float addrspace(1)* %out
+ ret void
+}
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