[llvm] r350355 - [X86] Remove terrible DX Register parsing hack in parse operand. NFCI.

[Nirav Davé via llvm-commits]

Ahha! I'll revert and add the failing test case.

On Thu, Jan 3, 2019, 17:18 Craig Topper <craig.topper at gmail.com wrote:

> I think there's still a bug that I was trying to fix with that hack, but I
> failed because CheckBaseRegAndIndexRegAndScale allows DX through. This
> assembles even though it shouldn't
>
> add (%dx), %ax
>
> ~Craig
>
>
> On Thu, Jan 3, 2019 at 1:49 PM Nirav Dave via llvm-commits <
> llvm-commits at lists.llvm.org> wrote:
>
>> Author: niravd
>> Date: Thu Jan  3 13:46:30 2019
>> New Revision: 350355
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=350355&view=rev
>> Log:
>> [X86] Remove terrible DX Register parsing hack in parse operand. NFCI.
>>
>> Fold hack special casing of (%dx) operand parsing into the related
>> hack for out*/in* instruction parsing.
>>
>> Modified:
>>     llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
>>     llvm/trunk/lib/Target/X86/AsmParser/X86Operand.h
>>
>> Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=350355&r1=350354&r2=350355&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
>> +++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Thu Jan  3
>> 13:46:30 2019
>> @@ -2240,14 +2240,6 @@ std::unique_ptr<X86Operand> X86AsmParser
>>    if (parseToken(AsmToken::RParen, "unexpected token in memory operand"))
>>      return nullptr;
>>
>> -  // This is a terrible hack to handle "out[s]?[bwl]? %al, (%dx)" ->
>> -  // "outb %al, %dx".  Out doesn't take a memory form, but this is a
>> widely
>> -  // documented form in various unofficial manuals, so a lot of code
>> uses it.
>> -  if (BaseReg == X86::DX && IndexReg == 0 && Scale == 1 &&
>> -      SegReg == 0 && isa<MCConstantExpr>(Disp) &&
>> -      cast<MCConstantExpr>(Disp)->getValue() == 0)
>> -    return X86Operand::CreateDXReg(BaseLoc, BaseLoc);
>> -
>>    StringRef ErrMsg;
>>    if (CheckBaseRegAndIndexRegAndScale(BaseReg, IndexReg, Scale,
>> is64BitMode(),
>>                                        ErrMsg)) {
>>
>> Modified: llvm/trunk/lib/Target/X86/AsmParser/X86Operand.h
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86Operand.h?rev=350355&r1=350354&r2=350355&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/lib/Target/X86/AsmParser/X86Operand.h (original)
>> +++ llvm/trunk/lib/Target/X86/AsmParser/X86Operand.h Thu Jan  3 13:46:30
>> 2019
>> @@ -30,7 +30,7 @@ namespace llvm {
>>  /// X86Operand - Instances of this class represent a parsed X86 machine
>>  /// instruction.
>>  struct X86Operand final : public MCParsedAsmOperand {
>> -  enum KindTy { Token, Register, Immediate, Memory, Prefix, DXRegister }
>> Kind;
>> +  enum KindTy { Token, Register, Immediate, Memory, Prefix } Kind;
>>
>>    SMLoc StartLoc, EndLoc;
>>    SMLoc OffsetOfLoc;
>> @@ -118,9 +118,6 @@ struct X86Operand final : public MCParse
>>      case Register:
>>        OS << "Reg:" << X86IntelInstPrinter::getRegisterName(Reg.RegNo);
>>        break;
>> -    case DXRegister:
>> -      OS << "DXReg";
>> -      break;
>>      case Immediate:
>>        PrintImmValue(Imm.Val, "Imm:");
>>        break;
>> @@ -444,7 +441,10 @@ struct X86Operand final : public MCParse
>>
>>    bool isPrefix() const { return Kind == Prefix; }
>>    bool isReg() const override { return Kind == Register; }
>> -  bool isDXReg() const { return Kind == DXRegister; }
>> +  bool isDXReg() const {
>> +    return Kind == Memory && getMemBaseReg() == X86::DX &&
>> !getMemIndexReg() &&
>> +           getMemScale() == 1;
>> +  }
>>
>>    bool isGR32orGR64() const {
>>      return Kind == Register &&
>> @@ -544,11 +544,6 @@ struct X86Operand final : public MCParse
>>    }
>>
>>    static std::unique_ptr<X86Operand>
>> -  CreateDXReg(SMLoc StartLoc, SMLoc EndLoc) {
>> -    return llvm::make_unique<X86Operand>(DXRegister, StartLoc, EndLoc);
>> -  }
>> -
>> -  static std::unique_ptr<X86Operand>
>>    CreatePrefix(unsigned Prefixes, SMLoc StartLoc, SMLoc EndLoc) {
>>      auto Res = llvm::make_unique<X86Operand>(Prefix, StartLoc, EndLoc);
>>      Res->Pref.Prefixes = Prefixes;
>>
>>
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>
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