[llvm] r350301 - [X86] Cleanup saturated add/sub tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 3 04:31:13 PST 2019
Author: rksimon
Date: Thu Jan 3 04:31:13 2019
New Revision: 350301
URL: http://llvm.org/viewvc/llvm-project?rev=350301&view=rev
Log:
[X86] Cleanup saturated add/sub tests
Use X86/X64 check prefixes
Use nounwind to reduce cfi noise
Modified:
llvm/trunk/test/CodeGen/X86/sadd_sat.ll
llvm/trunk/test/CodeGen/X86/ssub_sat.ll
llvm/trunk/test/CodeGen/X86/uadd_sat.ll
llvm/trunk/test/CodeGen/X86/usub_sat.ll
Modified: llvm/trunk/test/CodeGen/X86/sadd_sat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sadd_sat.ll?rev=350301&r1=350300&r2=350301&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sadd_sat.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sadd_sat.ll Thu Jan 3 04:31:13 2019
@@ -1,267 +1,240 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mcpu=generic -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=CHECK32
+; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=CHECK,X64
declare i4 @llvm.sadd.sat.i4 (i4, i4)
declare i32 @llvm.sadd.sat.i32 (i32, i32)
declare i64 @llvm.sadd.sat.i64 (i64, i64)
declare <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32>, <4 x i32>)
-define i32 @func(i32 %x, i32 %y) {
-; CHECK-LABEL: func:
-; CHECK: # %bb.0:
-; CHECK-NEXT: xorl %eax, %eax
-; CHECK-NEXT: movl %edi, %ecx
-; CHECK-NEXT: addl %esi, %ecx
-; CHECK-NEXT: setns %al
-; CHECK-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
-; CHECK-NEXT: addl %esi, %edi
-; CHECK-NEXT: cmovnol %edi, %eax
-; CHECK-NEXT: retq
+define i32 @func(i32 %x, i32 %y) nounwind {
+; X86-LABEL: func:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: xorl %ecx, %ecx
+; X86-NEXT: movl %eax, %esi
+; X86-NEXT: addl %edx, %esi
+; X86-NEXT: setns %cl
+; X86-NEXT: addl $2147483647, %ecx # imm = 0x7FFFFFFF
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: cmovol %ecx, %eax
+; X86-NEXT: popl %esi
+; X86-NEXT: retl
;
-; CHECK32-LABEL: func:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: pushl %esi
-; CHECK32-NEXT: .cfi_def_cfa_offset 8
-; CHECK32-NEXT: .cfi_offset %esi, -8
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK32-NEXT: xorl %ecx, %ecx
-; CHECK32-NEXT: movl %eax, %esi
-; CHECK32-NEXT: addl %edx, %esi
-; CHECK32-NEXT: setns %cl
-; CHECK32-NEXT: addl $2147483647, %ecx # imm = 0x7FFFFFFF
-; CHECK32-NEXT: addl %edx, %eax
-; CHECK32-NEXT: cmovol %ecx, %eax
-; CHECK32-NEXT: popl %esi
-; CHECK32-NEXT: .cfi_def_cfa_offset 4
-; CHECK32-NEXT: retl
+; X64-LABEL: func:
+; X64: # %bb.0:
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: movl %edi, %ecx
+; X64-NEXT: addl %esi, %ecx
+; X64-NEXT: setns %al
+; X64-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-NEXT: addl %esi, %edi
+; X64-NEXT: cmovnol %edi, %eax
+; X64-NEXT: retq
%tmp = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %y);
ret i32 %tmp;
}
-define i64 @func2(i64 %x, i64 %y) {
-; CHECK-LABEL: func2:
-; CHECK: # %bb.0:
-; CHECK-NEXT: xorl %ecx, %ecx
-; CHECK-NEXT: movq %rdi, %rax
-; CHECK-NEXT: addq %rsi, %rax
-; CHECK-NEXT: setns %cl
-; CHECK-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
-; CHECK-NEXT: addq %rcx, %rax
-; CHECK-NEXT: addq %rsi, %rdi
-; CHECK-NEXT: cmovnoq %rdi, %rax
-; CHECK-NEXT: retq
+define i64 @func2(i64 %x, i64 %y) nounwind {
+; X86-LABEL: func2:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebp
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
+; X86-NEXT: addl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl %ebx, %ebp
+; X86-NEXT: adcl %esi, %ebp
+; X86-NEXT: movl %ebp, %eax
+; X86-NEXT: sarl $31, %eax
+; X86-NEXT: xorl %ecx, %ecx
+; X86-NEXT: testl %ebp, %ebp
+; X86-NEXT: setns %cl
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF
+; X86-NEXT: testl %ebx, %ebx
+; X86-NEXT: setns %bl
+; X86-NEXT: cmpb %cl, %bl
+; X86-NEXT: setne %cl
+; X86-NEXT: testl %esi, %esi
+; X86-NEXT: setns %ch
+; X86-NEXT: cmpb %ch, %bl
+; X86-NEXT: sete %ch
+; X86-NEXT: testb %cl, %ch
+; X86-NEXT: cmovel %ebp, %edx
+; X86-NEXT: cmovel %edi, %eax
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: popl %ebp
+; X86-NEXT: retl
;
-; CHECK32-LABEL: func2:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: pushl %ebp
-; CHECK32-NEXT: .cfi_def_cfa_offset 8
-; CHECK32-NEXT: pushl %ebx
-; CHECK32-NEXT: .cfi_def_cfa_offset 12
-; CHECK32-NEXT: pushl %edi
-; CHECK32-NEXT: .cfi_def_cfa_offset 16
-; CHECK32-NEXT: pushl %esi
-; CHECK32-NEXT: .cfi_def_cfa_offset 20
-; CHECK32-NEXT: .cfi_offset %esi, -20
-; CHECK32-NEXT: .cfi_offset %edi, -16
-; CHECK32-NEXT: .cfi_offset %ebx, -12
-; CHECK32-NEXT: .cfi_offset %ebp, -8
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ebx
-; CHECK32-NEXT: addl {{[0-9]+}}(%esp), %edi
-; CHECK32-NEXT: movl %ebx, %ebp
-; CHECK32-NEXT: adcl %esi, %ebp
-; CHECK32-NEXT: movl %ebp, %eax
-; CHECK32-NEXT: sarl $31, %eax
-; CHECK32-NEXT: xorl %ecx, %ecx
-; CHECK32-NEXT: testl %ebp, %ebp
-; CHECK32-NEXT: setns %cl
-; CHECK32-NEXT: movl %ecx, %edx
-; CHECK32-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF
-; CHECK32-NEXT: testl %ebx, %ebx
-; CHECK32-NEXT: setns %bl
-; CHECK32-NEXT: cmpb %cl, %bl
-; CHECK32-NEXT: setne %cl
-; CHECK32-NEXT: testl %esi, %esi
-; CHECK32-NEXT: setns %ch
-; CHECK32-NEXT: cmpb %ch, %bl
-; CHECK32-NEXT: sete %ch
-; CHECK32-NEXT: testb %cl, %ch
-; CHECK32-NEXT: cmovel %ebp, %edx
-; CHECK32-NEXT: cmovel %edi, %eax
-; CHECK32-NEXT: popl %esi
-; CHECK32-NEXT: .cfi_def_cfa_offset 16
-; CHECK32-NEXT: popl %edi
-; CHECK32-NEXT: .cfi_def_cfa_offset 12
-; CHECK32-NEXT: popl %ebx
-; CHECK32-NEXT: .cfi_def_cfa_offset 8
-; CHECK32-NEXT: popl %ebp
-; CHECK32-NEXT: .cfi_def_cfa_offset 4
-; CHECK32-NEXT: retl
+; X64-LABEL: func2:
+; X64: # %bb.0:
+; X64-NEXT: xorl %ecx, %ecx
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: addq %rsi, %rax
+; X64-NEXT: setns %cl
+; X64-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
+; X64-NEXT: addq %rcx, %rax
+; X64-NEXT: addq %rsi, %rdi
+; X64-NEXT: cmovnoq %rdi, %rax
+; X64-NEXT: retq
%tmp = call i64 @llvm.sadd.sat.i64(i64 %x, i64 %y);
ret i64 %tmp;
}
-define i4 @func3(i4 %x, i4 %y) {
-; CHECK-LABEL: func3:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl %edi, %eax
-; CHECK-NEXT: shlb $4, %sil
-; CHECK-NEXT: shlb $4, %al
-; CHECK-NEXT: movl %eax, %ecx
-; CHECK-NEXT: addb %sil, %cl
-; CHECK-NEXT: setns %cl
-; CHECK-NEXT: addb %sil, %al
-; CHECK-NEXT: jno .LBB2_2
-; CHECK-NEXT: # %bb.1:
-; CHECK-NEXT: addb $127, %cl
-; CHECK-NEXT: movl %ecx, %eax
-; CHECK-NEXT: .LBB2_2:
-; CHECK-NEXT: sarb $4, %al
-; CHECK-NEXT: # kill: def $al killed $al killed $eax
-; CHECK-NEXT: retq
+define i4 @func3(i4 %x, i4 %y) nounwind {
+; X86-LABEL: func3:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: movb {{[0-9]+}}(%esp), %dl
+; X86-NEXT: shlb $4, %dl
+; X86-NEXT: shlb $4, %al
+; X86-NEXT: movl %eax, %ecx
+; X86-NEXT: addb %dl, %cl
+; X86-NEXT: setns %cl
+; X86-NEXT: addb %dl, %al
+; X86-NEXT: jno .LBB2_2
+; X86-NEXT: # %bb.1:
+; X86-NEXT: addb $127, %cl
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: .LBB2_2:
+; X86-NEXT: sarb $4, %al
+; X86-NEXT: retl
;
-; CHECK32-LABEL: func3:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %al
-; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %dl
-; CHECK32-NEXT: shlb $4, %dl
-; CHECK32-NEXT: shlb $4, %al
-; CHECK32-NEXT: movl %eax, %ecx
-; CHECK32-NEXT: addb %dl, %cl
-; CHECK32-NEXT: setns %cl
-; CHECK32-NEXT: addb %dl, %al
-; CHECK32-NEXT: jno .LBB2_2
-; CHECK32-NEXT: # %bb.1:
-; CHECK32-NEXT: addb $127, %cl
-; CHECK32-NEXT: movl %ecx, %eax
-; CHECK32-NEXT: .LBB2_2:
-; CHECK32-NEXT: sarb $4, %al
-; CHECK32-NEXT: retl
+; X64-LABEL: func3:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: shlb $4, %sil
+; X64-NEXT: shlb $4, %al
+; X64-NEXT: movl %eax, %ecx
+; X64-NEXT: addb %sil, %cl
+; X64-NEXT: setns %cl
+; X64-NEXT: addb %sil, %al
+; X64-NEXT: jno .LBB2_2
+; X64-NEXT: # %bb.1:
+; X64-NEXT: addb $127, %cl
+; X64-NEXT: movl %ecx, %eax
+; X64-NEXT: .LBB2_2:
+; X64-NEXT: sarb $4, %al
+; X64-NEXT: # kill: def $al killed $al killed $eax
+; X64-NEXT: retq
%tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %y);
ret i4 %tmp;
}
-define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) {
-; CHECK-LABEL: vec:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,2,3]
-; CHECK-NEXT: movd %xmm2, %ecx
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,2,3]
-; CHECK-NEXT: movd %xmm2, %r8d
-; CHECK-NEXT: xorl %edx, %edx
-; CHECK-NEXT: movl %r8d, %esi
-; CHECK-NEXT: addl %ecx, %esi
-; CHECK-NEXT: setns %dl
-; CHECK-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF
-; CHECK-NEXT: addl %ecx, %r8d
-; CHECK-NEXT: cmovol %edx, %r8d
-; CHECK-NEXT: movd %xmm1, %edx
-; CHECK-NEXT: movd %xmm0, %ecx
-; CHECK-NEXT: xorl %esi, %esi
-; CHECK-NEXT: movl %ecx, %edi
-; CHECK-NEXT: addl %edx, %edi
-; CHECK-NEXT: setns %sil
-; CHECK-NEXT: addl $2147483647, %esi # imm = 0x7FFFFFFF
-; CHECK-NEXT: addl %edx, %ecx
-; CHECK-NEXT: cmovol %esi, %ecx
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,0,1]
-; CHECK-NEXT: movd %xmm2, %edx
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
-; CHECK-NEXT: movd %xmm2, %eax
-; CHECK-NEXT: xorl %edi, %edi
-; CHECK-NEXT: movl %eax, %esi
-; CHECK-NEXT: addl %edx, %esi
-; CHECK-NEXT: setns %dil
-; CHECK-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF
-; CHECK-NEXT: addl %edx, %eax
-; CHECK-NEXT: cmovol %edi, %eax
-; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,1,2,3]
-; CHECK-NEXT: movd %xmm1, %r9d
-; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
-; CHECK-NEXT: movd %xmm0, %edx
-; CHECK-NEXT: xorl %edi, %edi
-; CHECK-NEXT: movl %edx, %esi
-; CHECK-NEXT: addl %r9d, %esi
-; CHECK-NEXT: setns %dil
-; CHECK-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF
-; CHECK-NEXT: addl %r9d, %edx
-; CHECK-NEXT: cmovol %edi, %edx
-; CHECK-NEXT: movd %edx, %xmm0
-; CHECK-NEXT: movd %eax, %xmm1
-; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
-; CHECK-NEXT: movd %ecx, %xmm0
-; CHECK-NEXT: movd %r8d, %xmm2
-; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
-; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; CHECK-NEXT: retq
+define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
+; X86-LABEL: vec:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebp
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: movl %ecx, %esi
+; X86-NEXT: addl %edx, %esi
+; X86-NEXT: setns %al
+; X86-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: addl %edx, %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: cmovol %eax, %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: movl %edx, %edi
+; X86-NEXT: addl %esi, %edi
+; X86-NEXT: setns %al
+; X86-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: addl %esi, %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: cmovol %eax, %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: movl %esi, %ebx
+; X86-NEXT: addl %edi, %ebx
+; X86-NEXT: setns %al
+; X86-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: addl %edi, %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: cmovol %eax, %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: xorl %ebx, %ebx
+; X86-NEXT: movl %edi, %ebp
+; X86-NEXT: addl %eax, %ebp
+; X86-NEXT: setns %bl
+; X86-NEXT: addl $2147483647, %ebx # imm = 0x7FFFFFFF
+; X86-NEXT: addl %eax, %edi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmovol %ebx, %edi
+; X86-NEXT: movl %ecx, 12(%eax)
+; X86-NEXT: movl %edx, 8(%eax)
+; X86-NEXT: movl %esi, 4(%eax)
+; X86-NEXT: movl %edi, (%eax)
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: popl %ebp
+; X86-NEXT: retl $4
;
-; CHECK32-LABEL: vec:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: pushl %ebp
-; CHECK32-NEXT: .cfi_def_cfa_offset 8
-; CHECK32-NEXT: pushl %ebx
-; CHECK32-NEXT: .cfi_def_cfa_offset 12
-; CHECK32-NEXT: pushl %edi
-; CHECK32-NEXT: .cfi_def_cfa_offset 16
-; CHECK32-NEXT: pushl %esi
-; CHECK32-NEXT: .cfi_def_cfa_offset 20
-; CHECK32-NEXT: .cfi_offset %esi, -20
-; CHECK32-NEXT: .cfi_offset %edi, -16
-; CHECK32-NEXT: .cfi_offset %ebx, -12
-; CHECK32-NEXT: .cfi_offset %ebp, -8
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK32-NEXT: xorl %eax, %eax
-; CHECK32-NEXT: movl %ecx, %esi
-; CHECK32-NEXT: addl %edx, %esi
-; CHECK32-NEXT: setns %al
-; CHECK32-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
-; CHECK32-NEXT: addl %edx, %ecx
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK32-NEXT: cmovol %eax, %ecx
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
-; CHECK32-NEXT: xorl %eax, %eax
-; CHECK32-NEXT: movl %edx, %edi
-; CHECK32-NEXT: addl %esi, %edi
-; CHECK32-NEXT: setns %al
-; CHECK32-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
-; CHECK32-NEXT: addl %esi, %edx
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
-; CHECK32-NEXT: cmovol %eax, %edx
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
-; CHECK32-NEXT: xorl %eax, %eax
-; CHECK32-NEXT: movl %esi, %ebx
-; CHECK32-NEXT: addl %edi, %ebx
-; CHECK32-NEXT: setns %al
-; CHECK32-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
-; CHECK32-NEXT: addl %edi, %esi
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
-; CHECK32-NEXT: cmovol %eax, %esi
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK32-NEXT: xorl %ebx, %ebx
-; CHECK32-NEXT: movl %edi, %ebp
-; CHECK32-NEXT: addl %eax, %ebp
-; CHECK32-NEXT: setns %bl
-; CHECK32-NEXT: addl $2147483647, %ebx # imm = 0x7FFFFFFF
-; CHECK32-NEXT: addl %eax, %edi
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK32-NEXT: cmovol %ebx, %edi
-; CHECK32-NEXT: movl %ecx, 12(%eax)
-; CHECK32-NEXT: movl %edx, 8(%eax)
-; CHECK32-NEXT: movl %esi, 4(%eax)
-; CHECK32-NEXT: movl %edi, (%eax)
-; CHECK32-NEXT: popl %esi
-; CHECK32-NEXT: .cfi_def_cfa_offset 16
-; CHECK32-NEXT: popl %edi
-; CHECK32-NEXT: .cfi_def_cfa_offset 12
-; CHECK32-NEXT: popl %ebx
-; CHECK32-NEXT: .cfi_def_cfa_offset 8
-; CHECK32-NEXT: popl %ebp
-; CHECK32-NEXT: .cfi_def_cfa_offset 4
-; CHECK32-NEXT: retl $4
+; X64-LABEL: vec:
+; X64: # %bb.0:
+; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,2,3]
+; X64-NEXT: movd %xmm2, %ecx
+; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,2,3]
+; X64-NEXT: movd %xmm2, %r8d
+; X64-NEXT: xorl %edx, %edx
+; X64-NEXT: movl %r8d, %esi
+; X64-NEXT: addl %ecx, %esi
+; X64-NEXT: setns %dl
+; X64-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF
+; X64-NEXT: addl %ecx, %r8d
+; X64-NEXT: cmovol %edx, %r8d
+; X64-NEXT: movd %xmm1, %edx
+; X64-NEXT: movd %xmm0, %ecx
+; X64-NEXT: xorl %esi, %esi
+; X64-NEXT: movl %ecx, %edi
+; X64-NEXT: addl %edx, %edi
+; X64-NEXT: setns %sil
+; X64-NEXT: addl $2147483647, %esi # imm = 0x7FFFFFFF
+; X64-NEXT: addl %edx, %ecx
+; X64-NEXT: cmovol %esi, %ecx
+; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,0,1]
+; X64-NEXT: movd %xmm2, %edx
+; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
+; X64-NEXT: movd %xmm2, %eax
+; X64-NEXT: xorl %edi, %edi
+; X64-NEXT: movl %eax, %esi
+; X64-NEXT: addl %edx, %esi
+; X64-NEXT: setns %dil
+; X64-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF
+; X64-NEXT: addl %edx, %eax
+; X64-NEXT: cmovol %edi, %eax
+; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,1,2,3]
+; X64-NEXT: movd %xmm1, %r9d
+; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
+; X64-NEXT: movd %xmm0, %edx
+; X64-NEXT: xorl %edi, %edi
+; X64-NEXT: movl %edx, %esi
+; X64-NEXT: addl %r9d, %esi
+; X64-NEXT: setns %dil
+; X64-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF
+; X64-NEXT: addl %r9d, %edx
+; X64-NEXT: cmovol %edi, %edx
+; X64-NEXT: movd %edx, %xmm0
+; X64-NEXT: movd %eax, %xmm1
+; X64-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
+; X64-NEXT: movd %ecx, %xmm0
+; X64-NEXT: movd %r8d, %xmm2
+; X64-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
+; X64-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; X64-NEXT: retq
%tmp = call <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32> %x, <4 x i32> %y);
ret <4 x i32> %tmp;
}
Modified: llvm/trunk/test/CodeGen/X86/ssub_sat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ssub_sat.ll?rev=350301&r1=350300&r2=350301&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ssub_sat.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ssub_sat.ll Thu Jan 3 04:31:13 2019
@@ -1,267 +1,240 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mcpu=generic -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=CHECK32
+; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=CHECK,X64
declare i4 @llvm.ssub.sat.i4 (i4, i4)
declare i32 @llvm.ssub.sat.i32 (i32, i32)
declare i64 @llvm.ssub.sat.i64 (i64, i64)
declare <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32>, <4 x i32>)
-define i32 @func(i32 %x, i32 %y) {
-; CHECK-LABEL: func:
-; CHECK: # %bb.0:
-; CHECK-NEXT: xorl %eax, %eax
-; CHECK-NEXT: movl %edi, %ecx
-; CHECK-NEXT: subl %esi, %ecx
-; CHECK-NEXT: setns %al
-; CHECK-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
-; CHECK-NEXT: subl %esi, %edi
-; CHECK-NEXT: cmovnol %edi, %eax
-; CHECK-NEXT: retq
+define i32 @func(i32 %x, i32 %y) nounwind {
+; X86-LABEL: func:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: xorl %ecx, %ecx
+; X86-NEXT: movl %eax, %esi
+; X86-NEXT: subl %edx, %esi
+; X86-NEXT: setns %cl
+; X86-NEXT: addl $2147483647, %ecx # imm = 0x7FFFFFFF
+; X86-NEXT: subl %edx, %eax
+; X86-NEXT: cmovol %ecx, %eax
+; X86-NEXT: popl %esi
+; X86-NEXT: retl
;
-; CHECK32-LABEL: func:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: pushl %esi
-; CHECK32-NEXT: .cfi_def_cfa_offset 8
-; CHECK32-NEXT: .cfi_offset %esi, -8
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK32-NEXT: xorl %ecx, %ecx
-; CHECK32-NEXT: movl %eax, %esi
-; CHECK32-NEXT: subl %edx, %esi
-; CHECK32-NEXT: setns %cl
-; CHECK32-NEXT: addl $2147483647, %ecx # imm = 0x7FFFFFFF
-; CHECK32-NEXT: subl %edx, %eax
-; CHECK32-NEXT: cmovol %ecx, %eax
-; CHECK32-NEXT: popl %esi
-; CHECK32-NEXT: .cfi_def_cfa_offset 4
-; CHECK32-NEXT: retl
+; X64-LABEL: func:
+; X64: # %bb.0:
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: movl %edi, %ecx
+; X64-NEXT: subl %esi, %ecx
+; X64-NEXT: setns %al
+; X64-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-NEXT: subl %esi, %edi
+; X64-NEXT: cmovnol %edi, %eax
+; X64-NEXT: retq
%tmp = call i32 @llvm.ssub.sat.i32(i32 %x, i32 %y);
ret i32 %tmp;
}
-define i64 @func2(i64 %x, i64 %y) {
-; CHECK-LABEL: func2:
-; CHECK: # %bb.0:
-; CHECK-NEXT: xorl %ecx, %ecx
-; CHECK-NEXT: movq %rdi, %rax
-; CHECK-NEXT: subq %rsi, %rax
-; CHECK-NEXT: setns %cl
-; CHECK-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
-; CHECK-NEXT: addq %rcx, %rax
-; CHECK-NEXT: subq %rsi, %rdi
-; CHECK-NEXT: cmovnoq %rdi, %rax
-; CHECK-NEXT: retq
+define i64 @func2(i64 %x, i64 %y) nounwind {
+; X86-LABEL: func2:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebp
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
+; X86-NEXT: subl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl %ebx, %ebp
+; X86-NEXT: sbbl %esi, %ebp
+; X86-NEXT: movl %ebp, %eax
+; X86-NEXT: sarl $31, %eax
+; X86-NEXT: xorl %ecx, %ecx
+; X86-NEXT: testl %ebp, %ebp
+; X86-NEXT: setns %cl
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF
+; X86-NEXT: testl %ebx, %ebx
+; X86-NEXT: setns %bl
+; X86-NEXT: cmpb %cl, %bl
+; X86-NEXT: setne %cl
+; X86-NEXT: testl %esi, %esi
+; X86-NEXT: setns %ch
+; X86-NEXT: cmpb %ch, %bl
+; X86-NEXT: setne %ch
+; X86-NEXT: testb %cl, %ch
+; X86-NEXT: cmovel %ebp, %edx
+; X86-NEXT: cmovel %edi, %eax
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: popl %ebp
+; X86-NEXT: retl
;
-; CHECK32-LABEL: func2:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: pushl %ebp
-; CHECK32-NEXT: .cfi_def_cfa_offset 8
-; CHECK32-NEXT: pushl %ebx
-; CHECK32-NEXT: .cfi_def_cfa_offset 12
-; CHECK32-NEXT: pushl %edi
-; CHECK32-NEXT: .cfi_def_cfa_offset 16
-; CHECK32-NEXT: pushl %esi
-; CHECK32-NEXT: .cfi_def_cfa_offset 20
-; CHECK32-NEXT: .cfi_offset %esi, -20
-; CHECK32-NEXT: .cfi_offset %edi, -16
-; CHECK32-NEXT: .cfi_offset %ebx, -12
-; CHECK32-NEXT: .cfi_offset %ebp, -8
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ebx
-; CHECK32-NEXT: subl {{[0-9]+}}(%esp), %edi
-; CHECK32-NEXT: movl %ebx, %ebp
-; CHECK32-NEXT: sbbl %esi, %ebp
-; CHECK32-NEXT: movl %ebp, %eax
-; CHECK32-NEXT: sarl $31, %eax
-; CHECK32-NEXT: xorl %ecx, %ecx
-; CHECK32-NEXT: testl %ebp, %ebp
-; CHECK32-NEXT: setns %cl
-; CHECK32-NEXT: movl %ecx, %edx
-; CHECK32-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF
-; CHECK32-NEXT: testl %ebx, %ebx
-; CHECK32-NEXT: setns %bl
-; CHECK32-NEXT: cmpb %cl, %bl
-; CHECK32-NEXT: setne %cl
-; CHECK32-NEXT: testl %esi, %esi
-; CHECK32-NEXT: setns %ch
-; CHECK32-NEXT: cmpb %ch, %bl
-; CHECK32-NEXT: setne %ch
-; CHECK32-NEXT: testb %cl, %ch
-; CHECK32-NEXT: cmovel %ebp, %edx
-; CHECK32-NEXT: cmovel %edi, %eax
-; CHECK32-NEXT: popl %esi
-; CHECK32-NEXT: .cfi_def_cfa_offset 16
-; CHECK32-NEXT: popl %edi
-; CHECK32-NEXT: .cfi_def_cfa_offset 12
-; CHECK32-NEXT: popl %ebx
-; CHECK32-NEXT: .cfi_def_cfa_offset 8
-; CHECK32-NEXT: popl %ebp
-; CHECK32-NEXT: .cfi_def_cfa_offset 4
-; CHECK32-NEXT: retl
+; X64-LABEL: func2:
+; X64: # %bb.0:
+; X64-NEXT: xorl %ecx, %ecx
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: subq %rsi, %rax
+; X64-NEXT: setns %cl
+; X64-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
+; X64-NEXT: addq %rcx, %rax
+; X64-NEXT: subq %rsi, %rdi
+; X64-NEXT: cmovnoq %rdi, %rax
+; X64-NEXT: retq
%tmp = call i64 @llvm.ssub.sat.i64(i64 %x, i64 %y);
ret i64 %tmp;
}
-define i4 @func3(i4 %x, i4 %y) {
-; CHECK-LABEL: func3:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl %edi, %eax
-; CHECK-NEXT: shlb $4, %sil
-; CHECK-NEXT: shlb $4, %al
-; CHECK-NEXT: movl %eax, %ecx
-; CHECK-NEXT: subb %sil, %cl
-; CHECK-NEXT: setns %cl
-; CHECK-NEXT: subb %sil, %al
-; CHECK-NEXT: jno .LBB2_2
-; CHECK-NEXT: # %bb.1:
-; CHECK-NEXT: addb $127, %cl
-; CHECK-NEXT: movl %ecx, %eax
-; CHECK-NEXT: .LBB2_2:
-; CHECK-NEXT: sarb $4, %al
-; CHECK-NEXT: # kill: def $al killed $al killed $eax
-; CHECK-NEXT: retq
+define i4 @func3(i4 %x, i4 %y) nounwind {
+; X86-LABEL: func3:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: movb {{[0-9]+}}(%esp), %dl
+; X86-NEXT: shlb $4, %dl
+; X86-NEXT: shlb $4, %al
+; X86-NEXT: movl %eax, %ecx
+; X86-NEXT: subb %dl, %cl
+; X86-NEXT: setns %cl
+; X86-NEXT: subb %dl, %al
+; X86-NEXT: jno .LBB2_2
+; X86-NEXT: # %bb.1:
+; X86-NEXT: addb $127, %cl
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: .LBB2_2:
+; X86-NEXT: sarb $4, %al
+; X86-NEXT: retl
;
-; CHECK32-LABEL: func3:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %al
-; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %dl
-; CHECK32-NEXT: shlb $4, %dl
-; CHECK32-NEXT: shlb $4, %al
-; CHECK32-NEXT: movl %eax, %ecx
-; CHECK32-NEXT: subb %dl, %cl
-; CHECK32-NEXT: setns %cl
-; CHECK32-NEXT: subb %dl, %al
-; CHECK32-NEXT: jno .LBB2_2
-; CHECK32-NEXT: # %bb.1:
-; CHECK32-NEXT: addb $127, %cl
-; CHECK32-NEXT: movl %ecx, %eax
-; CHECK32-NEXT: .LBB2_2:
-; CHECK32-NEXT: sarb $4, %al
-; CHECK32-NEXT: retl
+; X64-LABEL: func3:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: shlb $4, %sil
+; X64-NEXT: shlb $4, %al
+; X64-NEXT: movl %eax, %ecx
+; X64-NEXT: subb %sil, %cl
+; X64-NEXT: setns %cl
+; X64-NEXT: subb %sil, %al
+; X64-NEXT: jno .LBB2_2
+; X64-NEXT: # %bb.1:
+; X64-NEXT: addb $127, %cl
+; X64-NEXT: movl %ecx, %eax
+; X64-NEXT: .LBB2_2:
+; X64-NEXT: sarb $4, %al
+; X64-NEXT: # kill: def $al killed $al killed $eax
+; X64-NEXT: retq
%tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %y);
ret i4 %tmp;
}
-define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) {
-; CHECK-LABEL: vec:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,2,3]
-; CHECK-NEXT: movd %xmm2, %ecx
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,2,3]
-; CHECK-NEXT: movd %xmm2, %r8d
-; CHECK-NEXT: xorl %edx, %edx
-; CHECK-NEXT: movl %r8d, %esi
-; CHECK-NEXT: subl %ecx, %esi
-; CHECK-NEXT: setns %dl
-; CHECK-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF
-; CHECK-NEXT: subl %ecx, %r8d
-; CHECK-NEXT: cmovol %edx, %r8d
-; CHECK-NEXT: movd %xmm1, %edx
-; CHECK-NEXT: movd %xmm0, %ecx
-; CHECK-NEXT: xorl %esi, %esi
-; CHECK-NEXT: movl %ecx, %edi
-; CHECK-NEXT: subl %edx, %edi
-; CHECK-NEXT: setns %sil
-; CHECK-NEXT: addl $2147483647, %esi # imm = 0x7FFFFFFF
-; CHECK-NEXT: subl %edx, %ecx
-; CHECK-NEXT: cmovol %esi, %ecx
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,0,1]
-; CHECK-NEXT: movd %xmm2, %edx
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
-; CHECK-NEXT: movd %xmm2, %eax
-; CHECK-NEXT: xorl %edi, %edi
-; CHECK-NEXT: movl %eax, %esi
-; CHECK-NEXT: subl %edx, %esi
-; CHECK-NEXT: setns %dil
-; CHECK-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF
-; CHECK-NEXT: subl %edx, %eax
-; CHECK-NEXT: cmovol %edi, %eax
-; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,1,2,3]
-; CHECK-NEXT: movd %xmm1, %r9d
-; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
-; CHECK-NEXT: movd %xmm0, %edx
-; CHECK-NEXT: xorl %edi, %edi
-; CHECK-NEXT: movl %edx, %esi
-; CHECK-NEXT: subl %r9d, %esi
-; CHECK-NEXT: setns %dil
-; CHECK-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF
-; CHECK-NEXT: subl %r9d, %edx
-; CHECK-NEXT: cmovol %edi, %edx
-; CHECK-NEXT: movd %edx, %xmm0
-; CHECK-NEXT: movd %eax, %xmm1
-; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
-; CHECK-NEXT: movd %ecx, %xmm0
-; CHECK-NEXT: movd %r8d, %xmm2
-; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
-; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; CHECK-NEXT: retq
+define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
+; X86-LABEL: vec:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebp
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: movl %ecx, %esi
+; X86-NEXT: subl %edx, %esi
+; X86-NEXT: setns %al
+; X86-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: subl %edx, %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: cmovol %eax, %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: movl %edx, %edi
+; X86-NEXT: subl %esi, %edi
+; X86-NEXT: setns %al
+; X86-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: subl %esi, %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: cmovol %eax, %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: movl %esi, %ebx
+; X86-NEXT: subl %edi, %ebx
+; X86-NEXT: setns %al
+; X86-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: subl %edi, %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: cmovol %eax, %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: xorl %ebx, %ebx
+; X86-NEXT: movl %edi, %ebp
+; X86-NEXT: subl %eax, %ebp
+; X86-NEXT: setns %bl
+; X86-NEXT: addl $2147483647, %ebx # imm = 0x7FFFFFFF
+; X86-NEXT: subl %eax, %edi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmovol %ebx, %edi
+; X86-NEXT: movl %ecx, 12(%eax)
+; X86-NEXT: movl %edx, 8(%eax)
+; X86-NEXT: movl %esi, 4(%eax)
+; X86-NEXT: movl %edi, (%eax)
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: popl %ebp
+; X86-NEXT: retl $4
;
-; CHECK32-LABEL: vec:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: pushl %ebp
-; CHECK32-NEXT: .cfi_def_cfa_offset 8
-; CHECK32-NEXT: pushl %ebx
-; CHECK32-NEXT: .cfi_def_cfa_offset 12
-; CHECK32-NEXT: pushl %edi
-; CHECK32-NEXT: .cfi_def_cfa_offset 16
-; CHECK32-NEXT: pushl %esi
-; CHECK32-NEXT: .cfi_def_cfa_offset 20
-; CHECK32-NEXT: .cfi_offset %esi, -20
-; CHECK32-NEXT: .cfi_offset %edi, -16
-; CHECK32-NEXT: .cfi_offset %ebx, -12
-; CHECK32-NEXT: .cfi_offset %ebp, -8
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK32-NEXT: xorl %eax, %eax
-; CHECK32-NEXT: movl %ecx, %esi
-; CHECK32-NEXT: subl %edx, %esi
-; CHECK32-NEXT: setns %al
-; CHECK32-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
-; CHECK32-NEXT: subl %edx, %ecx
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK32-NEXT: cmovol %eax, %ecx
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
-; CHECK32-NEXT: xorl %eax, %eax
-; CHECK32-NEXT: movl %edx, %edi
-; CHECK32-NEXT: subl %esi, %edi
-; CHECK32-NEXT: setns %al
-; CHECK32-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
-; CHECK32-NEXT: subl %esi, %edx
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
-; CHECK32-NEXT: cmovol %eax, %edx
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
-; CHECK32-NEXT: xorl %eax, %eax
-; CHECK32-NEXT: movl %esi, %ebx
-; CHECK32-NEXT: subl %edi, %ebx
-; CHECK32-NEXT: setns %al
-; CHECK32-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
-; CHECK32-NEXT: subl %edi, %esi
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
-; CHECK32-NEXT: cmovol %eax, %esi
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK32-NEXT: xorl %ebx, %ebx
-; CHECK32-NEXT: movl %edi, %ebp
-; CHECK32-NEXT: subl %eax, %ebp
-; CHECK32-NEXT: setns %bl
-; CHECK32-NEXT: addl $2147483647, %ebx # imm = 0x7FFFFFFF
-; CHECK32-NEXT: subl %eax, %edi
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK32-NEXT: cmovol %ebx, %edi
-; CHECK32-NEXT: movl %ecx, 12(%eax)
-; CHECK32-NEXT: movl %edx, 8(%eax)
-; CHECK32-NEXT: movl %esi, 4(%eax)
-; CHECK32-NEXT: movl %edi, (%eax)
-; CHECK32-NEXT: popl %esi
-; CHECK32-NEXT: .cfi_def_cfa_offset 16
-; CHECK32-NEXT: popl %edi
-; CHECK32-NEXT: .cfi_def_cfa_offset 12
-; CHECK32-NEXT: popl %ebx
-; CHECK32-NEXT: .cfi_def_cfa_offset 8
-; CHECK32-NEXT: popl %ebp
-; CHECK32-NEXT: .cfi_def_cfa_offset 4
-; CHECK32-NEXT: retl $4
+; X64-LABEL: vec:
+; X64: # %bb.0:
+; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,2,3]
+; X64-NEXT: movd %xmm2, %ecx
+; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,2,3]
+; X64-NEXT: movd %xmm2, %r8d
+; X64-NEXT: xorl %edx, %edx
+; X64-NEXT: movl %r8d, %esi
+; X64-NEXT: subl %ecx, %esi
+; X64-NEXT: setns %dl
+; X64-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF
+; X64-NEXT: subl %ecx, %r8d
+; X64-NEXT: cmovol %edx, %r8d
+; X64-NEXT: movd %xmm1, %edx
+; X64-NEXT: movd %xmm0, %ecx
+; X64-NEXT: xorl %esi, %esi
+; X64-NEXT: movl %ecx, %edi
+; X64-NEXT: subl %edx, %edi
+; X64-NEXT: setns %sil
+; X64-NEXT: addl $2147483647, %esi # imm = 0x7FFFFFFF
+; X64-NEXT: subl %edx, %ecx
+; X64-NEXT: cmovol %esi, %ecx
+; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,0,1]
+; X64-NEXT: movd %xmm2, %edx
+; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
+; X64-NEXT: movd %xmm2, %eax
+; X64-NEXT: xorl %edi, %edi
+; X64-NEXT: movl %eax, %esi
+; X64-NEXT: subl %edx, %esi
+; X64-NEXT: setns %dil
+; X64-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF
+; X64-NEXT: subl %edx, %eax
+; X64-NEXT: cmovol %edi, %eax
+; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,1,2,3]
+; X64-NEXT: movd %xmm1, %r9d
+; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
+; X64-NEXT: movd %xmm0, %edx
+; X64-NEXT: xorl %edi, %edi
+; X64-NEXT: movl %edx, %esi
+; X64-NEXT: subl %r9d, %esi
+; X64-NEXT: setns %dil
+; X64-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF
+; X64-NEXT: subl %r9d, %edx
+; X64-NEXT: cmovol %edi, %edx
+; X64-NEXT: movd %edx, %xmm0
+; X64-NEXT: movd %eax, %xmm1
+; X64-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
+; X64-NEXT: movd %ecx, %xmm0
+; X64-NEXT: movd %r8d, %xmm2
+; X64-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
+; X64-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; X64-NEXT: retq
%tmp = call <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32> %x, <4 x i32> %y);
ret <4 x i32> %tmp;
}
Modified: llvm/trunk/test/CodeGen/X86/uadd_sat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/uadd_sat.ll?rev=350301&r1=350300&r2=350301&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/uadd_sat.ll (original)
+++ llvm/trunk/test/CodeGen/X86/uadd_sat.ll Thu Jan 3 04:31:13 2019
@@ -1,157 +1,148 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mcpu=generic -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=CHECK32
+; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=CHECK,X64
declare i4 @llvm.uadd.sat.i4 (i4, i4)
declare i32 @llvm.uadd.sat.i32 (i32, i32)
declare i64 @llvm.uadd.sat.i64 (i64, i64)
declare <4 x i32> @llvm.uadd.sat.v4i32(<4 x i32>, <4 x i32>)
-define i32 @func(i32 %x, i32 %y) {
-; CHECK-LABEL: func:
-; CHECK: # %bb.0:
-; CHECK-NEXT: addl %esi, %edi
-; CHECK-NEXT: movl $-1, %eax
-; CHECK-NEXT: cmovael %edi, %eax
-; CHECK-NEXT: retq
+define i32 @func(i32 %x, i32 %y) nounwind {
+; X86-LABEL: func:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl $-1, %eax
+; X86-NEXT: cmovael %ecx, %eax
+; X86-NEXT: retl
;
-; CHECK32-LABEL: func:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; CHECK32-NEXT: addl {{[0-9]+}}(%esp), %ecx
-; CHECK32-NEXT: movl $-1, %eax
-; CHECK32-NEXT: cmovael %ecx, %eax
-; CHECK32-NEXT: retl
+; X64-LABEL: func:
+; X64: # %bb.0:
+; X64-NEXT: addl %esi, %edi
+; X64-NEXT: movl $-1, %eax
+; X64-NEXT: cmovael %edi, %eax
+; X64-NEXT: retq
%tmp = call i32 @llvm.uadd.sat.i32(i32 %x, i32 %y);
ret i32 %tmp;
}
-define i64 @func2(i64 %x, i64 %y) {
-; CHECK-LABEL: func2:
-; CHECK: # %bb.0:
-; CHECK-NEXT: addq %rsi, %rdi
-; CHECK-NEXT: movq $-1, %rax
-; CHECK-NEXT: cmovaeq %rdi, %rax
-; CHECK-NEXT: retq
+define i64 @func2(i64 %x, i64 %y) nounwind {
+; X86-LABEL: func2:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl $-1, %ecx
+; X86-NEXT: cmovbl %ecx, %edx
+; X86-NEXT: cmovbl %ecx, %eax
+; X86-NEXT: retl
;
-; CHECK32-LABEL: func2:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK32-NEXT: addl {{[0-9]+}}(%esp), %eax
-; CHECK32-NEXT: adcl {{[0-9]+}}(%esp), %edx
-; CHECK32-NEXT: movl $-1, %ecx
-; CHECK32-NEXT: cmovbl %ecx, %edx
-; CHECK32-NEXT: cmovbl %ecx, %eax
-; CHECK32-NEXT: retl
+; X64-LABEL: func2:
+; X64: # %bb.0:
+; X64-NEXT: addq %rsi, %rdi
+; X64-NEXT: movq $-1, %rax
+; X64-NEXT: cmovaeq %rdi, %rax
+; X64-NEXT: retq
%tmp = call i64 @llvm.uadd.sat.i64(i64 %x, i64 %y);
ret i64 %tmp;
}
-define i4 @func3(i4 %x, i4 %y) {
-; CHECK-LABEL: func3:
-; CHECK: # %bb.0:
-; CHECK-NEXT: shlb $4, %sil
-; CHECK-NEXT: shlb $4, %dil
-; CHECK-NEXT: addb %sil, %dil
-; CHECK-NEXT: movb $-1, %al
-; CHECK-NEXT: jb .LBB2_2
-; CHECK-NEXT: # %bb.1:
-; CHECK-NEXT: movl %edi, %eax
-; CHECK-NEXT: .LBB2_2:
-; CHECK-NEXT: shrb $4, %al
-; CHECK-NEXT: retq
+define i4 @func3(i4 %x, i4 %y) nounwind {
+; X86-LABEL: func3:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: shlb $4, %al
+; X86-NEXT: shlb $4, %cl
+; X86-NEXT: addb %al, %cl
+; X86-NEXT: movb $-1, %al
+; X86-NEXT: jb .LBB2_2
+; X86-NEXT: # %bb.1:
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: .LBB2_2:
+; X86-NEXT: shrb $4, %al
+; X86-NEXT: retl
;
-; CHECK32-LABEL: func3:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %al
-; CHECK32-NEXT: shlb $4, %al
-; CHECK32-NEXT: shlb $4, %cl
-; CHECK32-NEXT: addb %al, %cl
-; CHECK32-NEXT: movb $-1, %al
-; CHECK32-NEXT: jb .LBB2_2
-; CHECK32-NEXT: # %bb.1:
-; CHECK32-NEXT: movl %ecx, %eax
-; CHECK32-NEXT: .LBB2_2:
-; CHECK32-NEXT: shrb $4, %al
-; CHECK32-NEXT: retl
+; X64-LABEL: func3:
+; X64: # %bb.0:
+; X64-NEXT: shlb $4, %sil
+; X64-NEXT: shlb $4, %dil
+; X64-NEXT: addb %sil, %dil
+; X64-NEXT: movb $-1, %al
+; X64-NEXT: jb .LBB2_2
+; X64-NEXT: # %bb.1:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: .LBB2_2:
+; X64-NEXT: shrb $4, %al
+; X64-NEXT: retq
%tmp = call i4 @llvm.uadd.sat.i4(i4 %x, i4 %y);
ret i4 %tmp;
}
-define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) {
-; CHECK-LABEL: vec:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,1,2,3]
-; CHECK-NEXT: movd %xmm2, %eax
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,1,2,3]
-; CHECK-NEXT: movd %xmm2, %ecx
-; CHECK-NEXT: addl %eax, %ecx
-; CHECK-NEXT: movl $-1, %eax
-; CHECK-NEXT: cmovbl %eax, %ecx
-; CHECK-NEXT: movd %ecx, %xmm2
-; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1]
-; CHECK-NEXT: movd %xmm3, %ecx
-; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
-; CHECK-NEXT: movd %xmm3, %edx
-; CHECK-NEXT: addl %ecx, %edx
-; CHECK-NEXT: cmovbl %eax, %edx
-; CHECK-NEXT: movd %edx, %xmm3
-; CHECK-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; CHECK-NEXT: movd %xmm1, %ecx
-; CHECK-NEXT: movd %xmm0, %edx
-; CHECK-NEXT: addl %ecx, %edx
-; CHECK-NEXT: cmovbl %eax, %edx
-; CHECK-NEXT: movd %edx, %xmm2
-; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,2,3]
-; CHECK-NEXT: movd %xmm1, %ecx
-; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
-; CHECK-NEXT: movd %xmm0, %edx
-; CHECK-NEXT: addl %ecx, %edx
-; CHECK-NEXT: cmovbl %eax, %edx
-; CHECK-NEXT: movd %edx, %xmm0
-; CHECK-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
-; CHECK-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
-; CHECK-NEXT: movdqa %xmm2, %xmm0
-; CHECK-NEXT: retq
+define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
+; X86-LABEL: vec:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: addl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl $-1, %ebx
+; X86-NEXT: cmovbl %ebx, %edi
+; X86-NEXT: addl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: cmovbl %ebx, %esi
+; X86-NEXT: addl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: cmovbl %ebx, %edx
+; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: cmovbl %ebx, %ecx
+; X86-NEXT: movl %ecx, 12(%eax)
+; X86-NEXT: movl %edx, 8(%eax)
+; X86-NEXT: movl %esi, 4(%eax)
+; X86-NEXT: movl %edi, (%eax)
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: retl $4
;
-; CHECK32-LABEL: vec:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: pushl %ebx
-; CHECK32-NEXT: .cfi_def_cfa_offset 8
-; CHECK32-NEXT: pushl %edi
-; CHECK32-NEXT: .cfi_def_cfa_offset 12
-; CHECK32-NEXT: pushl %esi
-; CHECK32-NEXT: .cfi_def_cfa_offset 16
-; CHECK32-NEXT: .cfi_offset %esi, -16
-; CHECK32-NEXT: .cfi_offset %edi, -12
-; CHECK32-NEXT: .cfi_offset %ebx, -8
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
-; CHECK32-NEXT: addl {{[0-9]+}}(%esp), %edi
-; CHECK32-NEXT: movl $-1, %ebx
-; CHECK32-NEXT: cmovbl %ebx, %edi
-; CHECK32-NEXT: addl {{[0-9]+}}(%esp), %esi
-; CHECK32-NEXT: cmovbl %ebx, %esi
-; CHECK32-NEXT: addl {{[0-9]+}}(%esp), %edx
-; CHECK32-NEXT: cmovbl %ebx, %edx
-; CHECK32-NEXT: addl {{[0-9]+}}(%esp), %ecx
-; CHECK32-NEXT: cmovbl %ebx, %ecx
-; CHECK32-NEXT: movl %ecx, 12(%eax)
-; CHECK32-NEXT: movl %edx, 8(%eax)
-; CHECK32-NEXT: movl %esi, 4(%eax)
-; CHECK32-NEXT: movl %edi, (%eax)
-; CHECK32-NEXT: popl %esi
-; CHECK32-NEXT: .cfi_def_cfa_offset 12
-; CHECK32-NEXT: popl %edi
-; CHECK32-NEXT: .cfi_def_cfa_offset 8
-; CHECK32-NEXT: popl %ebx
-; CHECK32-NEXT: .cfi_def_cfa_offset 4
-; CHECK32-NEXT: retl $4
+; X64-LABEL: vec:
+; X64: # %bb.0:
+; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,1,2,3]
+; X64-NEXT: movd %xmm2, %eax
+; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,1,2,3]
+; X64-NEXT: movd %xmm2, %ecx
+; X64-NEXT: addl %eax, %ecx
+; X64-NEXT: movl $-1, %eax
+; X64-NEXT: cmovbl %eax, %ecx
+; X64-NEXT: movd %ecx, %xmm2
+; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1]
+; X64-NEXT: movd %xmm3, %ecx
+; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
+; X64-NEXT: movd %xmm3, %edx
+; X64-NEXT: addl %ecx, %edx
+; X64-NEXT: cmovbl %eax, %edx
+; X64-NEXT: movd %edx, %xmm3
+; X64-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
+; X64-NEXT: movd %xmm1, %ecx
+; X64-NEXT: movd %xmm0, %edx
+; X64-NEXT: addl %ecx, %edx
+; X64-NEXT: cmovbl %eax, %edx
+; X64-NEXT: movd %edx, %xmm2
+; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,2,3]
+; X64-NEXT: movd %xmm1, %ecx
+; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
+; X64-NEXT: movd %xmm0, %edx
+; X64-NEXT: addl %ecx, %edx
+; X64-NEXT: cmovbl %eax, %edx
+; X64-NEXT: movd %edx, %xmm0
+; X64-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
+; X64-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; X64-NEXT: movdqa %xmm2, %xmm0
+; X64-NEXT: retq
%tmp = call <4 x i32> @llvm.uadd.sat.v4i32(<4 x i32> %x, <4 x i32> %y);
ret <4 x i32> %tmp;
}
Modified: llvm/trunk/test/CodeGen/X86/usub_sat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/usub_sat.ll?rev=350301&r1=350300&r2=350301&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/usub_sat.ll (original)
+++ llvm/trunk/test/CodeGen/X86/usub_sat.ll Thu Jan 3 04:31:13 2019
@@ -1,158 +1,149 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mcpu=generic -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=CHECK32
+; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=CHECK,X64
declare i4 @llvm.usub.sat.i4 (i4, i4)
declare i32 @llvm.usub.sat.i32 (i32, i32)
declare i64 @llvm.usub.sat.i64 (i64, i64)
declare <4 x i32> @llvm.usub.sat.v4i32(<4 x i32>, <4 x i32>)
-define i32 @func(i32 %x, i32 %y) {
-; CHECK-LABEL: func:
-; CHECK: # %bb.0:
-; CHECK-NEXT: xorl %eax, %eax
-; CHECK-NEXT: subl %esi, %edi
-; CHECK-NEXT: cmovael %edi, %eax
-; CHECK-NEXT: retq
+define i32 @func(i32 %x, i32 %y) nounwind {
+; X86-LABEL: func:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: xorl %ecx, %ecx
+; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmovbl %ecx, %eax
+; X86-NEXT: retl
;
-; CHECK32-LABEL: func:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK32-NEXT: xorl %ecx, %ecx
-; CHECK32-NEXT: subl {{[0-9]+}}(%esp), %eax
-; CHECK32-NEXT: cmovbl %ecx, %eax
-; CHECK32-NEXT: retl
+; X64-LABEL: func:
+; X64: # %bb.0:
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: subl %esi, %edi
+; X64-NEXT: cmovael %edi, %eax
+; X64-NEXT: retq
%tmp = call i32 @llvm.usub.sat.i32(i32 %x, i32 %y);
ret i32 %tmp;
}
-define i64 @func2(i64 %x, i64 %y) {
-; CHECK-LABEL: func2:
-; CHECK: # %bb.0:
-; CHECK-NEXT: xorl %eax, %eax
-; CHECK-NEXT: subq %rsi, %rdi
-; CHECK-NEXT: cmovaeq %rdi, %rax
-; CHECK-NEXT: retq
+define i64 @func2(i64 %x, i64 %y) nounwind {
+; X86-LABEL: func2:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: xorl %ecx, %ecx
+; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: sbbl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: cmovbl %ecx, %edx
+; X86-NEXT: cmovbl %ecx, %eax
+; X86-NEXT: retl
;
-; CHECK32-LABEL: func2:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK32-NEXT: xorl %ecx, %ecx
-; CHECK32-NEXT: subl {{[0-9]+}}(%esp), %eax
-; CHECK32-NEXT: sbbl {{[0-9]+}}(%esp), %edx
-; CHECK32-NEXT: cmovbl %ecx, %edx
-; CHECK32-NEXT: cmovbl %ecx, %eax
-; CHECK32-NEXT: retl
+; X64-LABEL: func2:
+; X64: # %bb.0:
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: subq %rsi, %rdi
+; X64-NEXT: cmovaeq %rdi, %rax
+; X64-NEXT: retq
%tmp = call i64 @llvm.usub.sat.i64(i64 %x, i64 %y);
ret i64 %tmp;
}
-define i4 @func3(i4 %x, i4 %y) {
-; CHECK-LABEL: func3:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl %edi, %eax
-; CHECK-NEXT: shlb $4, %sil
-; CHECK-NEXT: shlb $4, %al
-; CHECK-NEXT: subb %sil, %al
-; CHECK-NEXT: jae .LBB2_2
-; CHECK-NEXT: # %bb.1:
-; CHECK-NEXT: xorl %eax, %eax
-; CHECK-NEXT: .LBB2_2:
-; CHECK-NEXT: shrb $4, %al
-; CHECK-NEXT: # kill: def $al killed $al killed $eax
-; CHECK-NEXT: retq
+define i4 @func3(i4 %x, i4 %y) nounwind {
+; X86-LABEL: func3:
+; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: shlb $4, %cl
+; X86-NEXT: shlb $4, %al
+; X86-NEXT: subb %cl, %al
+; X86-NEXT: jae .LBB2_2
+; X86-NEXT: # %bb.1:
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: .LBB2_2:
+; X86-NEXT: shrb $4, %al
+; X86-NEXT: # kill: def $al killed $al killed $eax
+; X86-NEXT: retl
;
-; CHECK32-LABEL: func3:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %al
-; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK32-NEXT: shlb $4, %cl
-; CHECK32-NEXT: shlb $4, %al
-; CHECK32-NEXT: subb %cl, %al
-; CHECK32-NEXT: jae .LBB2_2
-; CHECK32-NEXT: # %bb.1:
-; CHECK32-NEXT: xorl %eax, %eax
-; CHECK32-NEXT: .LBB2_2:
-; CHECK32-NEXT: shrb $4, %al
-; CHECK32-NEXT: # kill: def $al killed $al killed $eax
-; CHECK32-NEXT: retl
+; X64-LABEL: func3:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: shlb $4, %sil
+; X64-NEXT: shlb $4, %al
+; X64-NEXT: subb %sil, %al
+; X64-NEXT: jae .LBB2_2
+; X64-NEXT: # %bb.1:
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: .LBB2_2:
+; X64-NEXT: shrb $4, %al
+; X64-NEXT: # kill: def $al killed $al killed $eax
+; X64-NEXT: retq
%tmp = call i4 @llvm.usub.sat.i4(i4 %x, i4 %y);
ret i4 %tmp;
}
-define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) {
-; CHECK-LABEL: vec:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,1,2,3]
-; CHECK-NEXT: movd %xmm2, %eax
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,1,2,3]
-; CHECK-NEXT: movd %xmm2, %ecx
-; CHECK-NEXT: xorl %edx, %edx
-; CHECK-NEXT: subl %eax, %ecx
-; CHECK-NEXT: cmovbl %edx, %ecx
-; CHECK-NEXT: movd %ecx, %xmm2
-; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1]
-; CHECK-NEXT: movd %xmm3, %eax
-; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
-; CHECK-NEXT: movd %xmm3, %ecx
-; CHECK-NEXT: subl %eax, %ecx
-; CHECK-NEXT: cmovbl %edx, %ecx
-; CHECK-NEXT: movd %ecx, %xmm3
-; CHECK-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; CHECK-NEXT: movd %xmm1, %eax
-; CHECK-NEXT: movd %xmm0, %ecx
-; CHECK-NEXT: subl %eax, %ecx
-; CHECK-NEXT: cmovbl %edx, %ecx
-; CHECK-NEXT: movd %ecx, %xmm2
-; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,2,3]
-; CHECK-NEXT: movd %xmm1, %eax
-; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
-; CHECK-NEXT: movd %xmm0, %ecx
-; CHECK-NEXT: subl %eax, %ecx
-; CHECK-NEXT: cmovbl %edx, %ecx
-; CHECK-NEXT: movd %ecx, %xmm0
-; CHECK-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
-; CHECK-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
-; CHECK-NEXT: movdqa %xmm2, %xmm0
-; CHECK-NEXT: retq
+define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
+; X86-LABEL: vec:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: xorl %ebx, %ebx
+; X86-NEXT: subl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: cmovbl %ebx, %edi
+; X86-NEXT: subl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: cmovbl %ebx, %esi
+; X86-NEXT: subl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: cmovbl %ebx, %edx
+; X86-NEXT: subl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: cmovbl %ebx, %ecx
+; X86-NEXT: movl %ecx, 12(%eax)
+; X86-NEXT: movl %edx, 8(%eax)
+; X86-NEXT: movl %esi, 4(%eax)
+; X86-NEXT: movl %edi, (%eax)
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: retl $4
;
-; CHECK32-LABEL: vec:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: pushl %ebx
-; CHECK32-NEXT: .cfi_def_cfa_offset 8
-; CHECK32-NEXT: pushl %edi
-; CHECK32-NEXT: .cfi_def_cfa_offset 12
-; CHECK32-NEXT: pushl %esi
-; CHECK32-NEXT: .cfi_def_cfa_offset 16
-; CHECK32-NEXT: .cfi_offset %esi, -16
-; CHECK32-NEXT: .cfi_offset %edi, -12
-; CHECK32-NEXT: .cfi_offset %ebx, -8
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
-; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
-; CHECK32-NEXT: xorl %ebx, %ebx
-; CHECK32-NEXT: subl {{[0-9]+}}(%esp), %edi
-; CHECK32-NEXT: cmovbl %ebx, %edi
-; CHECK32-NEXT: subl {{[0-9]+}}(%esp), %esi
-; CHECK32-NEXT: cmovbl %ebx, %esi
-; CHECK32-NEXT: subl {{[0-9]+}}(%esp), %edx
-; CHECK32-NEXT: cmovbl %ebx, %edx
-; CHECK32-NEXT: subl {{[0-9]+}}(%esp), %ecx
-; CHECK32-NEXT: cmovbl %ebx, %ecx
-; CHECK32-NEXT: movl %ecx, 12(%eax)
-; CHECK32-NEXT: movl %edx, 8(%eax)
-; CHECK32-NEXT: movl %esi, 4(%eax)
-; CHECK32-NEXT: movl %edi, (%eax)
-; CHECK32-NEXT: popl %esi
-; CHECK32-NEXT: .cfi_def_cfa_offset 12
-; CHECK32-NEXT: popl %edi
-; CHECK32-NEXT: .cfi_def_cfa_offset 8
-; CHECK32-NEXT: popl %ebx
-; CHECK32-NEXT: .cfi_def_cfa_offset 4
-; CHECK32-NEXT: retl $4
+; X64-LABEL: vec:
+; X64: # %bb.0:
+; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,1,2,3]
+; X64-NEXT: movd %xmm2, %eax
+; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,1,2,3]
+; X64-NEXT: movd %xmm2, %ecx
+; X64-NEXT: xorl %edx, %edx
+; X64-NEXT: subl %eax, %ecx
+; X64-NEXT: cmovbl %edx, %ecx
+; X64-NEXT: movd %ecx, %xmm2
+; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1]
+; X64-NEXT: movd %xmm3, %eax
+; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
+; X64-NEXT: movd %xmm3, %ecx
+; X64-NEXT: subl %eax, %ecx
+; X64-NEXT: cmovbl %edx, %ecx
+; X64-NEXT: movd %ecx, %xmm3
+; X64-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
+; X64-NEXT: movd %xmm1, %eax
+; X64-NEXT: movd %xmm0, %ecx
+; X64-NEXT: subl %eax, %ecx
+; X64-NEXT: cmovbl %edx, %ecx
+; X64-NEXT: movd %ecx, %xmm2
+; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,2,3]
+; X64-NEXT: movd %xmm1, %eax
+; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
+; X64-NEXT: movd %xmm0, %ecx
+; X64-NEXT: subl %eax, %ecx
+; X64-NEXT: cmovbl %edx, %ecx
+; X64-NEXT: movd %ecx, %xmm0
+; X64-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
+; X64-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; X64-NEXT: movdqa %xmm2, %xmm0
+; X64-NEXT: retq
%tmp = call <4 x i32> @llvm.usub.sat.v4i32(<4 x i32> %x, <4 x i32> %y);
ret <4 x i32> %tmp;
}
More information about the llvm-commits
mailing list