[PATCH] D56264: [RISCV] Add patterns for RV64I SLLW/SRLW/SRAW instructions

[Alex Bradbury via Phabricator via llvm-commits]

asb created this revision.
asb added a reviewer: eli.friedman.
Herald added subscribers: jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, mgrang, edward-jones, zzheng, shiva0217, kito-cheng, niosHD, sabuasal, apazos, simoncook, johnrusso, rbar.

This restores support for selecting the SLLW/SRLW/SRAW instructions, which was removed in rL348067 <https://reviews.llvm.org/rL348067> as the previous patterns made some unsafe assumptions. Also see the related llvm-dev discussion <http://lists.llvm.org/pipermail/llvm-dev/2018-December/128497.html>.

Ultimately I didn't introduce a custom SelectionDAG node, but instead added a DAG combine that inserts an AssertZext i5 on the shift amount for an i32 variable-length shift and also added an ANY_EXTEND DAG-combine which will instead produce a SIGN_EXTEND for an i32 variable-length shift, increasing the opportunity to safely select SLLW/SRLW/SRAW.

There are obviously different ways of addressing this (a number discussed in the llvm-dev thread), so I'd welcome further feedback and comments.

Note that there are now some cases in test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll where sraw/srlw/sllw is selected even though sra/srl/sll could be used without any extra instructions. Given both are semantically equivalent, there doesn't seem a good reason to prefer one vs the other. Given that would require more logic to still select sra/srl/sll in those cases, I've left it preferring the *w variants.


https://reviews.llvm.org/D56264

Files:
  lib/Target/RISCV/RISCVISelLowering.cpp
  lib/Target/RISCV/RISCVInstrInfo.td
  test/CodeGen/RISCV/alu32.ll
  test/CodeGen/RISCV/alu64.ll
  test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D56264.180029.patch
Type: text/x-patch
Size: 34418 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190103/74f7d45e/attachment.bin>